Datasheet

LTC3838-1
15
38381f
For more information www.linear.com3838-1
DRV
CC
/EXTV
CC
/INTV
CC
Power
DRV
CC1,2
are the power for the bottom MOSFET drivers.
Normally the two DRV
CC
pins are shorted together on
the PCB, and decoupled to PGND with a minimum 4.7µF
ceramic capacitor, C
DRVCC
. The top MOSFET drivers are
biased from the floating bootstrap capacitors (C
B1,2
)
which are recharged during each cycle through an external
Schottky diode when the top MOSFET
turns off and the
SW pin swings down.
The DRV
CC
can be powered two ways: an internal low-
dropout (LDO) linear voltage regulator that is powered
from V
IN
and can output 5.3V to DRV
CC1
. Alternatively,
an internal EXTV
CC
switch (with on-resistance of around
2Ω) can short the EXTV
CC
pin to DRV
CC2
.
If the EXTV
CC
pin is below the EXTV
CC
switchover voltage
(
typically 4.6V with 200mV hysteresis, see the Electrical
Characteristics Table), then the internal 5.3V LDO is en-
abled. If the EXTV
CC
pin is tied to an external voltage source
greater than this EXTV
CC
switchover voltage, then the LDO
is shut down and the internal EXTV
CC
switch shorts the
EXTV
CC
pin to the DRV
CC2
pin. In this case, DRV
CC
and
INTV
CC
draw power from the external voltage source,
which helps to increase overall efficiency and decrease
internal self heating from power dissipated in the LDO. If
the output voltage of the converter itself is above the up-
per switchover voltage limit (4.8V), it can provide power
for EXTV
CC
. The V
IN
pin still needs to be powered up but
now draws minimum current.
Power for most internal control circuitry other than
gate
drivers is derived from the INTV
CC
pin. INTV
CC
can be pow-
ered from the combined DRV
CC
pins through an external
RC filter to SGND to filter out noises due to switching.
Shutdown and Start-Up
Each of the RUN1 and RUN2 pins has an internal proportion-
al-to-absolute-temperature (PTAT) current source (around
1.2µA at 25°C) to pull up the pins. Taking both
RUN1 and
RUN2 pins below a certain threshold voltage (around 0.8V
at 25°C) shuts down all bias of INTV
CC
and DRV
CC
and
places the LTC3838-1 into micropower shutdown mode
with a minimum I
Q
at the V
IN
pin. The LTC3838-1’s DRV
CC
(through the internal 5.3V LDO regulator or EXTV
CC
) and
the corresponding channel’s internal circuitry off INTV
CC
will be biased up
when either or both RUN pins are pulled
up above the 0.8V threshold, either by the internal pull-up
current or driven directly by an external voltage source
such as a logic gate output.
A channel of the LTC3838-1 will not start switching until
the RUN pin of the respective channel is pulled up to 1.2V.
When a RUN pin rises above 1.2V, the corresponding
channel’s
TG and BG drivers are enabled, and TRACK/
SS released. An additional 5µA temperature-independent
pull-up current is connected internally to the channel’s
respective RUN pin. To turn off TG, BG and the additional
5µA pull-up current, RUN needs to be pulled down be-
low 1.2V by about 100mV. These built-in current and
voltage hystereses prevent false jittery turn-on and turn
-off
due to noise. These features on the RUN pins allow input
undervoltage lockout (UVLO) to be set up using external
voltage dividers from V
IN
.
The start-up of a channel’s output voltage (V
OUT
) is
controlled by the voltage on its TRACK/SS pin. When the
voltage on the TRACK/SS pin is less than the 0.6V inter-
nal reference, the feedback voltage (V
FB
) is regulated to
the TRACK/SS voltage instead of the 0.6V reference. The
TRACK/SS pin can be used to program the output voltage
soft-start ramp-up time by connecting an external capaci-
tor from a TRACK/SS pin to signal ground. An internal
temperature-independent 1µA pull-up current charges this
capacitor, creating a voltage ramp on the TRACK/SS pin.
As the TRACK/SS
voltage rises from ground to 0.6V, the
switching starts, and V
OUT
ramps up smoothly to its final
value and the feedback voltage to 0.6V. TRACK/SS will keep
rising beyond 0.6V, until being clamped to around 3.7V.
Upon enabling the RUN pin, if V
OUT
is prebiased at a
level above zero, the top gate (TG) will remain off and
V
OUT
stays prebiased. Once TRACK/SS rises above the
prebiased feedback level, and TG starts switching, V
OUT
will be regulated according to TRACK/SS or the reference,
whichever is lower.
Alternatively, the TRACK/SS pin can be used to track an
external supply like in a master slave configuration. Typi-
cally, this requires connecting a resistor divider from the
master supply to the TRACK/SS pin (see the Applications
Information section).
OPERATION
(Refer to Functional Diagram)