Datasheet

LTC3838-1
12
38381f
For more information www.linear.com/3838-1
SW1, SW2 (Pin 21, Pin 30): Switch Node Connection to
Inductors. Voltage swings are from a diode voltage below
ground to V
IN
. The (–) terminal of the bootstrap capacitor,
C
B
, connects to this node.
BG1, BG2 (Pin 22, Pin 29): Bottom Gate Driver Outputs.
The BG pins drive the gates of the bottom N
-channel power
MOSFET between PGND and DRV
CC
.
DRV
CC1
, DRV
CC2
(Pin 23, Pin 28): Supplies of Bottom
Gate Drivers. DRV
CC1
is also the output of an internal 5.3V
regulator. DRV
CC2
is also the output of the EXTV
CC
switch.
Normally the two DRV
CC
pins are shorted together on the
PCB, and decoupled to PGND with a minimum of 4.7µF
ceramic capacitor, C
DRVCC
.
V
IN
(Pin 24): Input Voltage Supply. The supply voltage
can range from 4.5V to 38V. For increased noise immunity
decouple this pin to SGND with an RC filter. Voltage at
this pin is also used to adjust top gate on-time, therefore
it is recommended to tie this pin to the main power input
supply through an RC filter.
PIN FUNCTIONS
PGND (Pin 25, Exposed Pad Pin 39): Power Ground.
Connect this
pin as close as practical to the source of the
bottom N-channel power MOSFET, the (–) terminal of
C
DRVCC
and the (–) terminal of C
IN
. Connect the exposed
pad and PGND pin to SGND pin using a single PCB trace
under the IC. The exposed pad must be soldered to the
circuit board for electrical and rated thermal performance.
INTV
CC
(Pin 26): Supply Input for Internal Circuitry (Not
Including Gate Drivers). Normally powered from the DRV
CC
pins through a decoupling RC filter to SGND (typically
2Ω and 1µF).
EXTV
CC
(Pin 27): External Power Input. When EXTV
CC
exceeds the switchover voltage (typically 4.6V), an internal
switch connects this pin to DRV
CC2
and shuts down the
internal regulator so that INTV
CC
and gate drivers draw
power from EXTV
CC
. The V
IN
pin still needs to be powered
up but draws minimum current.
V
DFB2
–
(Pin 38): Differential Feedback Amplifier (–) Input
of Channel 2. Connect this pin to the negative terminal of
the output load capacitor of V
OUT2
.