Datasheet

LTC3835
14
3835fd
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode (Optional)
Selection
Two external power MOSFETs must be selected for the
LTC3835: One N-channel MOSFET for the top (main)
switch, and one N-channel MOSFET for the bottom (syn-
chronous) switch.
The peak-to-peak drive levels are set by the INTV
CC
voltage.
This voltage is typically 5V during start-up (see EXTV
CC
Pin
Connection). Consequently, logic-level threshold MOSFETs
must be used in most applications. The only exception
is if low input voltage is expected (V
IN
< 5V); then, sub-
logic level threshold MOSFETs (V
GS(TH)
< 3V) should be
used. Pay close attention to the BV
DSS
specification for
the MOSFETs as well; most of the logic level MOSFETs are
limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, Miller capacitance C
MILLER
, input
voltage and maximum output current. Miller capacitance,
C
MILLER
, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C
MILLER
is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in V
DS
. This result is
then multiplied by the ratio of the application applied V
DS
to the Gate charge curve specified V
DS
. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Main Switch Duty Cycle=
V
OUT
V
IN
Synchronous Switch Duty Cycle =
V
IN
– V
OUT
V
IN
The MOSFET power dissipations at maximum output
current are given by:
P
MAIN
=
V
OUT
V
IN
I
MAX
( )
2
1+ d
( )
R
DS(ON)
+
V
IN
( )
2
I
MAX
2






R
DR
( )
C
MILLER
( )
•
1
V
INTVCC
– V
THMIN
+
1
V
THMIN






f
( )
P
SYNC
=
V
IN
– V
OUT
V
IN
I
MAX
( )
2
1+ d
( )
R
DS(ON)
where d is the temperature dependency of R
DS(ON)
and
R
DR
(approximately 2Ω) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V
THMIN
is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V
the high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1+d) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
d = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diode D1 shown in Figure 6 conducts
during the dead-time between the conduction of the two
power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period that
could cost as much as 3% in efficiency at high V
IN
. A 1A
to 3A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition losses
due to their larger junction capacitance.
APPLICATIONS INFORMATION