Datasheet

LTC3835-1
18
38351fc
APPLICATIONS INFORMATION
If the external clock frequency is greater than the internal
oscillator’s frequency, f
OSC
, then current is sourced con-
tinuously from the phase detector output, pulling up the
PLLLPF pin. When the external clock frequency is less
than f
OSC
, current is sunk continuously, pulling down
the PLLLPF pin. If the external and internal frequencies
are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to
the phase difference. The voltage on the PLLLPF pin is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the fi lter capacitor C
LP
holds the voltage.
The loop fi lter components, C
LP
and R
LP
, smooth out the
current pulses from the phase detector and provide a stable
input to the voltage-controlled oscillator. The fi lter compo-
nents C
LP
and R
LP
determine how fast the loop acquires
lock. Typically R
LP
= 10k and C
LP
is 2200pF to 0.01μF.
Typically, the external clock (on PLLIN/MODE pin) input high
threshold is 1.6V, while the input low threshold is 1.2V.
Table 1 summarizes the different states in which the
PLLLPF pin can be used.
Table 1
PLLLPF PIN PLLIN/MODE PIN FREQUENCY
0V DC Voltage 250kHz
Floating DC Voltage 400kHz
INTV
CC
DC Voltage 530kHz
RC Loop Filter Clock Signal Phase-Locked to External Clock
Minimum On-Time Considerations
Minimum on-time t
ON(MIN)
is the smallest time duration that
the LTC3835-1 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
t
V
Vf
ON MIN
OUT
IN
()
()
<
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3835-1 is approximately
180ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases up to about 200ns.
This is of particular concern in forced continuous applica-
tions with low ripple current at light loads. If the duty cycle
drops below the minimum on-time limit in this situation,
a signifi cant amount of cycle skipping can occur with cor-
respondingly larger current and voltage ripple.