Datasheet

13
LTC3834-1
38341f
APPLICATIO S I FOR ATIO
WUUU
The MOSFET power dissipations at maximum output
current are given by:
P
V
V
ITR
V
I
MAIN
OUT
IN
MAX DS ON
IN
M
=
()
+
()
+
()
2
2
1 δΔ
()
AAX
DR MILLER
INTVCC THMIN
RC
VVV
2
11
⎛
⎝
⎜
⎞
⎠
⎟
()( )
+
•
–
TTHMIN
f
⎡
⎣
⎢
⎤
⎦
⎥
()
P
VV
V
ITR
SYNC
IN OUT
IN
MAX DS ON
=
()
+
()
–
()
2
1 δΔ
where δ is the temperature dependency of R
DS(ON)
and
R
DR
(approximately 2 ) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V
THMIN
is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V the
high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1+δΔT) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diode D1 shown in Figure 8 con-
ducts during the dead-time between the conduction of the
two power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period that
could cost as much as 3% in efficiency at high V
IN
. A 1A
to 3A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition losses
due to their larger junction capacitance.
C
IN
and C
OUT
Selection
In continuous mode, the source current of the top MOS-
FET is a square wave of duty cycle (V
OUT
)/(V
IN
). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C
I
V
VVV
IN
MAX
IN
OUT IN OUT
Required I
RMS
≈
()( )
[]
–
/12
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
= I
OUT
/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet size or height requirements in the
design. Due to the high operating frequency of the
LTC3834-1, ceramic capacitors can also be used for C
IN
.
Always consult the manufacturer if there is any question.
The selection of C
OUT
is driven by the effective series
resistance (ESR). Typically, once the ESR requirement is
satisfied, the capacitance is adequate for filtering. The
output ripple ( V
OUT
) is approximated by:
Δ≈ +
⎛
⎝
⎜
⎞
⎠
⎟
V I ESR
fC
OUT RIPPLE
OUT
1
8
where f is the operating frequency, C
OUT
is the output
capacitance and I
RIPPLE
is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I
RIPPLE
increases with input voltage.