Datasheet

LTC3833
27
3833f
APPLICATIONS INFORMATION
The resulting maximum ripple current is:
I
L
=
1.2V
350kHz 0.56µH
1–
1.2V
24V
5.8A
Often in high power applications, DCR current sensing is
preferred over R
SENSE
in order to maximize efficiency. In
order to determine the DCR filter values, first the induc-
tor manufacturer has to be chosen. For this design, the
Vishay IHLP-4040DZ-01 model is chosen with a value of
0.56μH and DCR
MAX
=1.8mΩ. This implies that:
V
SENSE(MAX)
= DRC
MAX
at 25°C • [1 + 0.4% (T
L(MAX)
– 25°C)] • [I
OUT(MAX)
I
L
/2]
= 1.8mΩ • [1 + 0.4% (100°C – 25°C)] •
[15A – 5.8A/2]
≈ 28.3mV
The maximum sense voltage is within the range that
LTC3833 can handle without any additional scaling. There-
fore, the DCR filter consists of a simple RC filter across
the inductor. If the C is chosen to be 0.1µF, then the R can
be calculated as:
R
DCR
=
L
DCR
MAX
C
DCR
=
0.56µH
1.8m 0.1µF
3.11k
The closest standard value is 3.09k.
The resulting value of V
RNG
with a 50% design margin
factor is:
V
RNG
= V
SENSE(MAX)
/0.05 • MF
= 28.3mV/0.05 • 1.5 ≈ 850mV
To generate the V
RNG
voltage, connect a resistive divider
from INTV
CC
to SGND with R
DIV1
= 52.3k and R
DIV2
=
10k.
For the external N-channel MOSFETs, Renesas RJK-
0305DBP (R
DS(ON)
= 13mΩ max, C
MILLER
= 150pF, V
GS
= 4.5V, θ
JA
= 40°C/W, T
J(MAX)
= 150°C) is chosen for the
top MOSFET (main switch), and RJK0330DBP (R
DS(ON)
= 3.9mΩ max, V
GS
= 4.5V, θ
JA
= 40°C/W, T
J(MAX)
=
150°C) is chosen for the bottom MOSFET (synchronous
switch). The power dissipation and the resulting junction
temperature for each MOSFET can be calculated for V
IN
= 24V and T
A
= 75°C:
P
TOP
=
1.2V
24V
15A
( )
2
13m
( )
1+ 0.4
( )
+ 24V
( )
2
15A
2
150pF
( )
2.5
5.3V 3V
+
1.2
3V
350kHz
0.54W
T
J(TOP)
= 75°C+ 0.54W
( )
40°C
W
97°C
P
BOT
=
24V 1.2V
24V
15A
( )
2
3.9m
( )
1+ 0.4
( )
1.2W
T
J(BOT)
= 75°C+ 1.2W
( )
40°C
W
= 123°C
These numbers show that careful attention should be paid
to proper heat sinking when operating at higher ambient
temperatures.
Select C
IN
to give an RMS current rating greater than 7A
at 75°C. The output capacitor C
OUT
is chosen for a low
ESR of 4.5mΩ to minimize output voltage changes due to
inductor ripple current and load steps. The output voltage
ripple is given as:
V
OUT(RIPPLE)
= I
L(MAX)
• ESR = (5.8A)(4.5mΩ)
≈ 26mV
However, a 0A to 10A load step will cause an output
change of up to:
V
OUT(STEP)
= I
LOAD
• ESR = (10A)(4.5mΩ) = 45mV
Optional 100μF ceramic output capacitors are included to
minimize the effect of ESR and ESL in the output ripple
and to improve load step response.