Datasheet

LTC3833
14
3833f
APPLICATIONS INFORMATION
point that is to be accurately regulated through remote
differential sensing.
Switching Frequency Programming
The choice of operating frequency is a trade-off between
efficiency and component size. Lowering the operating fre-
quency improves efficiency by reducing MOSFET switching
losses but requires larger inductance and/or capacitance
to maintain low output ripple voltage. Conversely, raising
the operating frequency degrades efficiency but reduces
component size.
The switching frequency of the LTC3833 can be pro-
grammed from 200kHz to 2MHz by connecting a resistor
from the RT pin to signal ground. The value of this resistor
is given by the following empirical formula:
R
T
kΩ
[ ]
=
41550
f kHz
[ ]
– 2.2
Not counting resistor tolerances, the switching fre-
quency could still have a ±10% deviation from the ideal
programmed value. The internal PLL has a synchroniza-
tion range of ±30% around this programmed frequency.
Therefore, during external clock synchronization be sure
that the external clock frequency is within this ±30% range
of the RT programmed frequency. It is advisable that the
RT programmed frequency be equal to the external clock
for maximum synchronization margin. Refer to Phase and
Frequency Synchronization for further details.
Inductor Selection
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use of
smaller inductor and capacitor values. A higher frequency
generally results in lower efficiency because of MOSFET
gate charge losses and top MOSFET transition losses.
In addition to this basic trade-off, the effect of inductor
value on ripple current and low current operation must
also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current, ∆I
L
, decreases with higher
inductance or frequency and increases with higher V
IN
:
∆I
L
=
V
OUT
f •L
• 1–
V
OUT
V
IN






Accepting larger values of ∆I
L
allows the use of low induc-
tances, but results in higher output voltage ripple, higher
ESR losses in the output capacitor, and greater core losses.
A reasonable starting point for setting ripple current is
∆I
L
= 0.4 • I
OUT(MAX)
where I
OUT(MAX)
is the maximum
output current for the application. The maximum ∆I
L
occurs at the maximum input voltage. To guarantee that
R
FB1
MB
R
FB2
MT
L
C
IN
V
IN
C
OUT1
C
OUT2
3833 F02
I
LOAD
OTHER CURRENTS
FLOWING IN
SHARED GROUND
PLANE
POWER TRACE
PARASITICS
±V
DROP(PWR)
+
–
GROUND TRACE
PARASITICS
±V
DROP(GND)
I
LOAD
LTC3833
V
OSNS
+
V
OSNS
–
Figure 2: Differential Output Sensing Used to Correct Line Loss Variations in a
High Power Distributed System with a Shared Ground Plane