LTC3829 3-Phase, Single Output Synchronous Step-Down DC/DC Controller with Diffamp DESCRIPTION FEATURES n n n n n n n n n n n n n n n Optional Nonlinear Control for Fast Response ±0.75%, 0.
LTC3829 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (VIN).......................... 40V to –0.3V Topside Driver Voltages (BOOSTn)............. 46V to –0.3V Switch Voltage (SWn).................................... 40V to –5V Boosted Driver Voltage (BOOSTn – SWn)..... 6V to –0.3V INTVCC, PGOOD, RUN, EXTVCC..................... 6V to –0.3V ITEMP, IFAST, VFB Pin Voltages............... INTVCC to –0.3V TK/SS, FREQ, DIFFP, DIFFN, DIFFOUT, ISET AVP, ILIM, MODE, PLLIN Voltages........... INTVCC to –0.
LTC3829 ORDER INFORMATION (Note 2) LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3829EUHF#PBF LTC3829EUHF#TRPBF 3829 38-Lead (5mm × 7mm) Plastic QFN –40°C to 125°C LTC3829IUHF#PBF LTC3829IUHF#TRPBF 3829 38-Lead (5mm × 7mm) Plastic QFN –40°C to 125°C LTC3829EFE#PBF LTC3829EFE#TRPBF LTC3829 38-Lead Plastic TSSOP –40°C to 125°C LTC3829IFE#PBF LTC3829IFE#TRPBF LTC3829 38-Lead Plastic TSSOP –40°C to 125°C Consult LTC Marketing for parts specified
LTC3829 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN = 5V, unless otherwise noted.
LTC3829 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN = 5V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX 9 10 11 UNITS Nonlinear Fast Transit Mode Fast Transient Programmable Current IFAST VIFAST = 400mV µA AVP (Active Voltage Positioning) ISINK ISOURCE Sink Current of AVP Pin SENSE+ = 1.
LTC3829 TYPICAL PERFORMANCE CHARACTERISTICS Phase Shedding Transition Phase Shedding Transition VSW1 10V/DIV VSW1 10V/DIV VSW2 10V/DIV VSW2 10V/DIV VSW3 10V/DIV VSW3 10V/DIV VOUT 50mV/DIV AC-COUPLED VOUT 50mV/DIV AC-COUPLED 3829 G03 VIN = 12V 4µs/DIV VOUT = 1.5V TRANSITION LOAD CURRENT = 18.6A Prebiased Output at 2V Coincident Tracking RUN 2V/DIV VOUT1 VOUT1 = 3.3V VOUT2 = 1.5V 1V/DIV VOUT2 VOUT 1V/DIV VFB 500mV/DIV TK/SS 500mV/DIV VIN = 12V VOUT = 3.3V 5.3 4.9 4.7 4.5 4.3 4.1 3.9 3.7 3.
LTC3829 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Current Sense Threshold vs Common Mode Voltage 70 60 ILIM = FLOAT 50 40 ILIM = GND 30 20 10 0 0 4 3 2 VSENSE COMMON MODE VOLTAGE (V) 1 5 100 MAXIMUM CURRENT SENSE VOLTAGE (mV) ILIM = INTVCC 80 Maximum Current Sense Voltage vs Duty Cycle MAXIMUM CURRENT SENSE VOLTAGE (mV) CURRENT SENSE THRESHOLD (mV) 90 Maximum Current Sense Voltage vs Feedback Voltage (Current Foldback) 90 ILIM = INTVCC 80 70 60 ILIM = FLOAT 50 40 ILIM = GND 30 20 10
LTC3829 TYPICAL PERFORMANCE CHARACTERISTICS Shutdown Current vs Input Voltage 30 20 10 70 6 60 5 QUIESCENT CURRENT (mA) 40 SHUTDOWN CURRENT (µA) SHUTDOWN CURRENT (µA) 50 0 50 40 30 20 10 25 15 30 20 INPUT VOLTAGE (V) 35 40 0 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3829 G21 3829 G20 PIN FUNCTIONS 4 3 2 1 10 5 Quiescent Current vs Temperature without EXTVCC Shutdown Current vs Temperature 0 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3829 G22 (UHF/FE) DIFFN (Pin 1/Pin
LTC3829 PIN FUNCTIONS (UHF/FE) ISET (Pin 15/Pin 17): Stage Shedding Comparator and Burst Mode Comparator Programming Pin. A resistor to ground programs the stage shedding comparator threshold or Burst Mode comparator threshold and its current limit depending on MODE pin setting. TG1, TG2, TG3 (Pins 32, 27, 20/Pins 34, 29, 22): Top Gate Driver Outputs. These are the outputs of floating drivers with a voltage swing equal to INTVCC superimposed on the switch nodes voltages.
LTC3829 FUNCTIONAL DIAGRAM MODE EXTVCC ITEMP PLLIN 4.7V FREQ + – TEMPSNS 0.6V MODE/SYNC DETECT VIN F + 5V REG + – CIN INTVCC F PLL-SYNC VIN INTVCC BOOST BURSTEN CLKOUT S R Q + 3k ICOMP M1 SENSE+ SWITCH LOGIC AND ANTISHOOTTHROUGH IREV IFAST DB SENSE– L1 VOUT + BG RUN COUT M2 OV IFAST CB SW ON – + – TG FCNT OSC CVCC PGND ILIM PGOOD SLOPE COMPENSATION + INTVCC 1 51k ITHB UVLO UV SHED COMP SLEEP R2 – + – – + + 0.5V – EA SS RUN 1.
LTC3829 OPERATION (Refer to Functional Diagram) Main Control Loop The LTC3829 uses a constant frequency, current mode step-down architecture. During normal operation, each top MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the main current comparator, ICMP , resets each RS latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of the error amplifier, EA.
LTC3829 OPERATION (Refer to Functional Diagram) Light Load Current Operation (Burst Mode Operation, Stage Shedding or Continuous Conduction) The LTC3829 can be enabled to enter high efficiency Burst Mode operation, Stage Shedding mode or forced continuous conduction mode. To select forced continuous operation, tie the MODE pin to a DC voltage below 0.6V (e.g., SGND). To select Stage Shedding mode of operation, tie the MODE pin to INTVCC. To select Burst Mode operation, float the MODE pin.
LTC3829 OPERATION (Refer to Functional Diagram) A phase-locked loop (PLL) is available on the LTC3829 to synchronize the internal oscillator to an external clock source that is connected to the PLLIN pin. The PLL loop filter network is integrated inside the LTC3829. The phaselocked loop is capable of locking any frequency within the range of 250kHz to 770kHz. The frequency setting resistor should always be present to set the controller’s initial switching frequency before locking to the external clock.
LTC3829 APPLICATIONS INFORMATION The Typical Application on the first page of this data sheet is a basic LTC3829 application circuit. The LTC3829 can be configured to use either DCR (inductor resistance) sensing or low value resistor sensing. The choice between the two current sensing schemes is largely a design trade-off between cost, power consumption and accuracy.
LTC3829 APPLICATIONS INFORMATION VIN INTVCC VIN SENSE RESISTOR PLUS PARASITIC INDUCTANCE BOOST TG LTC3829 RS SW BG VOUT CF • 2 • RF ≤ ESL/RS POLE-ZERO CANCELLATION PGND RF SENSE+ ESL CF SENSE– SGND RF FILTER COMPONENTS PLACED NEAR SENSE PINS 3829 F02a (2a) Using a Resistor to Sense Current VIN INTVCC VIN BOOST OPTIONAL TEMP COMP NETWORK L SW VOUT BG PGND R1** SENSE+ RNTC DCR LTC3829 ITEMP RS INDUCTOR TG RP C1* R2 SENSE– SGND L R2 R = DCR *PLACE C1 NEAR SENSE+, R1||R2 × C1 = D
LTC3829 APPLICATIONS INFORMATION current and the on-time and off-time of the top switch, the value of the parasitic inductance was determined to be 0.5nH using the equation: ESL = VESL(STEP) tON • tOFF ∆IL tON + tOFF (1) If the RC time constant is chosen to be close to the parasitic inductance divided by the sense resistor (L/R), the resulting waveform looks resistive again, as shown in Figure 4.
LTC3829 APPLICATIONS INFORMATION A conservative value for TL(MAX) is 100°C. To scale the maximum inductor DCR to the desired sense resistor value, use the divider ratio: RD = RSENSE(EQUIV) DCR(MAX) at TL(MAX) C1 is usually selected to be in the range of 0.047µF to 0.47µF. This forces R1|| R2 to around 2k, reducing error that might have been caused by the SENSE+ pins’ ±1µA current. TL(MAX) is the maximum inductor temperature.
LTC3829 APPLICATIONS INFORMATION The NTC resistor has a negative temperature coefficient, meaning its value decreases as temperature rises. The VITEMP voltage, therefore, decreases as temperature increases and in turn, the VSENSEMAX(ADJ) will increase to compensate the DCR temperature coefficient. The NTC resistor, however, is nonlinear and the user can linearize its value by building a resistor network with regular resistors. Consult the NTC manufacture data sheets for detailed information.
LTC3829 APPLICATIONS INFORMATION Generating the IMAX versus inductor temperature curve plot first using the above values as a starting point and then adjusting the RS and RP values as necessary is another approach. Figure 6 shows a typical curve of IMAX versus inductor temperature. 10000 THERMISTOR RESISTANCE RO = 100k TO = 25°C B = 4334 FOR 25°C/100°C RESISTANCE (kΩ) 1000 100 10 The same thermistor network can be used to correct for temperatures less than 25°C. But make sure VITEMP is greater than 0.
LTC3829 APPLICATIONS INFORMATION Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency current mode architectures by preventing sub-harmonic oscillation at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, this results in a reduction of maximum inductor peak current for duty cycles greater than 40%.
LTC3829 APPLICATIONS INFORMATION Power MOSFET and Schottky Diode (Optional) Selection At least two external power MOSFETs must be selected for each of the three output sections: One N-channel MOSFET for the top (main) switch and one or more N‑channel MOSFET(s) for the bottom (synchronous) switch. The number, type and on-resistance of all MOSFETs selected take into account the voltage step-down ratio as well as the actual position (main or synchronous) in which the MOSFET will be used.
LTC3829 APPLICATIONS INFORMATION where N is the number of output stages, δ is the temperature dependency of RDS(ON), RDR is the effective top driver resistance (approximately 2Ω at VGS = VMILLER), VIN is the drain potential and the change in drain potential in the particular application. VTH(IL) is the data sheet specified typical gate threshold voltage specified in the power MOSFET data sheet at the specified drain current.
LTC3829 APPLICATIONS INFORMATION The Figure 10 graph shows that the peak RMS input current is reduced linearly, inversely proportional to the number N of stages used. It is important to note that the efficiency loss is proportional to the input RMS current squared and therefore a 3-stage implementation results in 90% less power loss when compared to a single-phase design.
LTC3829 APPLICATIONS INFORMATION The emergence of very low ESR capacitors in small, surface mount packages makes very small physical implementations possible. The ability to externally compensate the switching regulator loop using the ITH pin allows a much wider selection of output capacitor types. The impedance characteristic of each capacitor type is significantly different than an ideal capacitor and therefore requires accurate modeling or bench evaluation during design.
LTC3829 APPLICATIONS INFORMATION The final load slope is defined by the inductor current sense resistors and the two external resistors mentioned above. In summary, the load slope is: Programmable Burst Mode Operation When the MODE pin is floating, the LTC3829 enters Burst Mode operation. This means that all channels will stop switching when ITH is below a certain threshold.
LTC3829 APPLICATIONS INFORMATION Nonlinear control is only enabled when VFB is within the UV and OV window. It should be enabled only for forced continuous mode of operation. Once nonlinear control is enabled, the top gate of all channels will turn on if: VFB = VREF – 0.5 – VIFAST •1.2 5 The top gate of all channels will turn off if: VFB = VREF + 0.5 – VIFAST 5 where VREF is the reference voltage, normally at 0.6V, and VFB is the feedback voltage.
LTC3829 APPLICATIONS INFORMATION The LTC3829 allows the user to program how its output ramps up and down by means of the TK/SS pins. Through these pins, the output can be set up to either coincidentally or ratiometrically track another supply’s output, as shown in Figure 11. In the following discussions, VOUT1 refers to the LTC3829’s output as a master and VOUT2 refers to another supply output as a slave.
LTC3829 APPLICATIONS INFORMATION INTVCC (LDO) and EXTVCC The LTC3829 features a true PMOS LDO that supplies power to INTVCC from the VIN supply. INTVCC powers the gate drivers and much of the LTC3829’s internal circuitry. The LDO regulates the voltage at the INTVCC pin to 5V when VIN is greater than 5.5V. EXTVCC connects to INTVCC through a P-channel MOSFET and can supply the needed power when its voltage is higher than 4.7V.
LTC3829 APPLICATIONS INFORMATION 4. EXTVCC connected to an output-derived boost network. For 3.3V and other low voltage regulators, efficiency gains can still be realized by connecting EXTVCC to an output-derived voltage that has been boosted to greater than 4.7V. For applications where the main input power is 5V, tie the VIN and INTVCC pins together and tie the combined pins to the 5V input with a 1Ω or 2.2Ω resistor as shown in Figure 13 to minimize the voltage drop caused by the gate charge current.
LTC3829 APPLICATIONS INFORMATION Fault Conditions: Current Limit and Current Foldback The LTC3829 includes current foldback to help limit load current when the output is shorted to ground. If the output falls below 50% of its nominal output level, then the maximum sense voltage is progressively lowered from its maximum programmed value to one-third of the maximum value. Foldback current limiting is disabled during the soft-start or tracking up.
LTC3829 APPLICATIONS INFORMATION 900 800 FREQUENCY (kHz) 700 600 500 400 300 200 100 0 0 0.5 1 1.5 FREQ PIN VOLTAGE (V) 2 2.5 38501 F15 Figure 15. Relationship Between Oscillator Frequency and Voltage at the FREQ Pin 2.4V 5V 10µA RSET FREQ EXTERNAL OSCILLATOR PLLIN DIGITAL SYNC PHASE/ FREQUENCY DETECTOR VCO 3829 F16 Figure 16.
LTC3829 APPLICATIONS INFORMATION Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: %Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power.
LTC3829 APPLICATIONS INFORMATION Checking Transient Response The regulator loop response can be checked by looking at the load current transient response. Switching regulators take several cycles to respond to a step in DC (resistive) load current. When a load step occurs, VOUT shifts by an amount equal to ∆ILOAD (ESR), where ESR is the effective series resistance of COUT .
LTC3829 APPLICATIONS INFORMATION 1. Keep the SGND at one end of a printed circuit path thus preventing MOSFET currents from traveling under the IC. The INTVCC decoupling capacitor should be placed immediately adjacent to the IC between the INTVCC pin and PGND plane. A 1µF ceramic capacitor of the X7R or X5R type is small enough to fit very close to the IC to minimize the ill effects of the large current pulses drawn to drive the bottom MOSFETs.
LTC3829 APPLICATIONS INFORMATION L1 SW1 RSENSE1 D1 L2 VIN SW2 RIN + CIN VOUT RSENSE2 COUT D2 BOLD LINES INDICATE HIGH, SWITCHING CURRENTS. KEEP LINES TO A MINIMUM LENGTH. + RL L3 SW3 RSENSE3 D3 3829 F17 Figure 17. Branch Current Waveform 3829fa For more information www.linear.
100pF VOSENSE+ VOSENSE– 0Ω 40.2k CLKOUT CSS 0.1µF ITEMP PGOOD EXTVCC 66.5Ω DIFFOUT 13.5k 47pF 1nF 20.0k 9 39 37 17 23 4 38 2 1 15 14 13 34 TK/SS GND ITEMP PGOOD EXTVCC AVP DIFFOUT DIFFP DIFFN ISET ITH VFB CLKOUT PLLIN For more information www.linear.com/LTC3829 C21 1000pF 5 6 ILIM C22 1000pF 7 LTC3829 FREQ 18 16 10 35 3 RUN 30.1k PLLIN SENSE1– SENSE2+ MODE 36 25 22 21 20 19 0.
LTC3829 PACKAGE DESCRIPTION UHF Package 38-Lead Plastic QFN (5mm × 7mm) (Reference LTC DWG # 05-08-1701 Rev C) 0.70 ± 0.05 5.50 ± 0.05 5.15 ± 0.05 4.10 ± 0.05 3.00 REF 3.15 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 5.5 REF 6.10 ± 0.05 7.50 ± 0.05 RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ± 0.10 0.75 ± 0.05 PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 3.00 REF 37 0.00 – 0.05 38 0.40 ±0.10 PIN 1 TOP MARK (SEE NOTE 6) 1 2 5.15 ± 0.10 5.50 REF 7.
LTC3829 PACKAGE DESCRIPTION FE Package 38-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1772 Rev A) Exposed Pad Variation AA 4.75 REF 38 9.60 – 9.80* (.378 – .386) 4.75 REF (.187) 20 6.60 ±0.10 4.50 REF 2.74 REF SEE NOTE 4 6.40 2.74 REF (.252) (.108) BSC 0.315 ±0.05 1.05 ±0.10 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN MILLIMETERS (INCHES) 3.
LTC3829 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 03/13 Note 2 clarification, updated Phase Shedding Transition curves. Updated DIFFP, AVP, ITEMP pin functions and ∆VOUT equation. Updated schematic 5, 6 8, 9, 23 40 3829fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use.
LTC3829 TYPICAL APPLICATION 1.2V/60A Triple Phase Converter with Active Voltage Positioning, fSW = 400kHz, RDROOP = 1.33mΩ 4.7µF SW3 SW2 SW1 220pF 10k 100k INTVCC EXTVCC ITEMP BOOST1 BOOST2 BOOST3 RUN ILIM MODE FREQ ITH TK/SS 0.1µF VIN DIFFOUT AVP ISET VFB DIFFN DIFFP PGOOD 75Ω 20k TG1 0.3µH SW1 0.001Ω VIN 22µF 6V TO 14V 35V ×3 BG1 PGND SENSE1+ SENSE1– TG2 VIN 0.3µH SW2 LTC3829 SGND 20k + VOUT 1.2V 60A 0.001Ω BG2 IFAST SENSE2+ SENSE2– TG3 SW3 VIN 0.3µH 0.
