Datasheet

LTC3828
3
3828fc
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
IN
= 15V, V
RUN1, 2
= 5V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loops
V
OSENSE1, 2
Regulated Feedback Voltage (Note 3); I
TH1, 2
Voltage = 1.2V
l
0.792 0.800 0.808 V
I
VOSENSE1, 2
Feedback Current (Note 3) ±5 ±50 nA
V
REFLNREG
Reference Voltage Line Regulation V
IN
= 4.6V to 28V (Note 3) 0.002 0.02 %/V
V
LOADREG
Output Voltage Load Regulation (Note 3)
Measured in Servo Loop; ΔI
TH
Voltage = 1.2V to 0.7V
Measured in Servo Loop; ΔI
TH
Voltage = 1.2V to 2.0V
l
l
0.1
–0.1
0.5
–0.5
%
%
g
m1, 2
Transconductance Amplifi er g
m
I
TH1, 2
= 1.2V; Sink/Source 5µA; (Note 3) 1.3 mmho
g
mGBW1, 2
Transconductance Amplifi er GBW I
TH1, 2
= 1.2V; (Note 3) 3 MHz
I
Q
Input DC Supply Current
Normal Mode
Shutdown
(Note 4)
V
OUT1
= 5V
V
RUN/SS1, 2
= 0V
2
20
3
100
mA
µA
V
FCB
Forced Continuous Threshold
l
0.76 0.800 0.84 V
I
FCB
Forced Continuous Pin Current V
FCB
= 0.85V –0.50 –0.18 –0.1 µA
V
BINHIBIT
Burst Inhibit (Constant Frequency)
Threshold
Measured at FCB pin 4.3 4.8 V
UVLO Undervoltage Lockout V
IN
Ramping Down
l
3.5 4 V
V
OVL
Feedback Overvoltage Lockout Measured at V
OSENSE1, 2
l
0.84 0.86 0.88 V
I
SENSE
Sense Pins Total Source Current (Each Channel); V
SENSE1
–
, 2
–
= V
SENSE1
+
, 2
+
= 0V –90 –65 µA
DF
MAX
Maximum Duty Factor In Dropout 98 99.4 %
I
TRCKSS1,2
Soft-Start Charge Current V
TRCKSS1, 2
= 0.2V 0.5 1.2 µA
V
RUN1, 2
ON RUN Pin ON Threshold V
RUN1
, V
RUN2
Rising 1.0 1.5 2.0 V
V
SENSE(MAX)
Maximum Current Sense Threshold V
OSENSE1, 2
= 0.7V,V
SENSE1
–
, 2
–
= 5V
V
OSENSE1, 2
= 0.7V,V
SENSE1
–
, 2
–
= 5V
l
62
60
75
75
85
88
mV
mV
TG1, 2 tr
TG1, 2 tf
TG Transition Time:
Rise Time
Fall Time
(Note 5)
C
LOAD
= 3300pF
C
LOAD
= 3300pF
55
55
100
100
ns
ns
BG1, 2 tr
BG1, 2 tf
BG Transition Time:
Rise Time
Fall Time
(Note 5)
C
LOAD
= 3300pF
C
LOAD
= 3300pF
65
55
120
100
ns
ns
TG/BG t
1D
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time
C
LOAD
= 3300pF Each Driver 60 ns
BG/TG t
2D
Bottom Gate Off to Top Gate On Delay
Top Switch-On Delay Time
C
LOAD
= 3300pF Each Driver 80 ns
t
ON(MIN)
Minimum On-Time Tested with a Square Wave (Note 6) 120 ns
INTV
CC
Linear Regulator
V
INTVCC
Internal V
CC
Voltage 6V < V
IN
< 30V 4.8 5.0 5.2 V
V
LDO
INT INTV
CC
Load Regulation I
CC
= 0mA to 20mA 0.2 2.0 %
Oscillator and Phase-Locked Loop
f
NOM
Nominal Frequency V
PLLFLTR
= 1.2V 360 400 440 kHz
f
LOW
Lowest Frequency V
PLLFLTR
= 0V 230 260 290 kHz
f
HIGH
Highest Frequency V
PLLFLTR
≥ 2.4V 480 550 590 kHz
I
PLLFLTR
Phase Detector Output Current
Sinking Capability
Sourcing Capability
V
PLLFLTR
= 1.2V
f
PLLIN
< f
NOM
f
PLLIN
> f
NOM
–17
17
µA
µA