Datasheet

LTC3828
24
3828fc
during load-dump. Note that the transient suppressor
should not conduct during double-battery operation, but
must still clamp the input voltage below breakdown of the
converter. Although the LTC3828 have a maximum input
voltage of 30V, most applications will also be limited to
30V by the MOSFET BVD
SS
.
occurs at the maximum input voltage. Tie the PLLFLTR
pin to a resistive divider from the INTV
CC
pin, generating
0.7V for 300kHz operation. The minimum inductance for
30% ripple current is:
ΔI
V
fL
V
V
L
OUT OUT
IN
=
()()
1
A 4.7µH inductor will produce 23% ripple current and a
3.3µH will result in 33%. The peak inductor current will
be the maximum DC value plus one half the ripple cur-
rent, or 5.84A, for the 3.3µH value. Increasing the ripple
current will also help ensure that the minimum on-time
of 100ns is not violated. The minimum on-time occurs at
maximum V
IN
:
t
V
Vf
V
V kHz
ns
ON MIN
OUT
IN MAX
()
()
.
()
== =
18
22 300
273
The R
SENSE
resistor value can be calculated by using the
maximum current sense voltage specifi cation with some
accommodation for tolerances:
R
mV
A
SENSE
≤≈Ω
60
584
001
.
.
Since the output voltage is below 2.4V the output resis-
tive divider will need to be sized to not only set the output
voltage but also to absorb the SENSE pin’s specifi ed input
current.
Rk
V
VV
k
V
VV
k
MAX
OUT
124
08
24
24
08
24 18
32
()
.
.–
.
.–.
=
=
=
Choosing 1% resistors: R1 = 25.5k and R2 = 32.4k yields
an output voltage of 1.816V.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Fairchild FDS6982S dual MOSFET
results in: R
DS(ON)
= 0.035/0.022, C
MILLER
= 215pF. At
maximum input voltage with T(estimated) = 50°C:
APPLICATIONS INFORMATION
V
IN
3828 F11a
LTC3828
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
50A I
PK
RATING
12V
Figure 11a. Automotive Application Protection
For applications where the main input power is 5V, tie the
V
IN
, INTV
CC
and DRV
CC
pins together and tie the combined
pins to the 5V input with a 1 or 2.2 resistor as shown
in Figure 11b to minimize the voltage drop caused by the
gate charge current. This will override the INTV
CC
regula-
tor and will prevent INTV
CC
from dropping too low due to
the dropout voltage. Make sure the INTV
CC
voltage is at
or exceeds the R
DS(ON)
test voltage for the MOSFET which
is typically 4.5V for logic-level devices.
Figure 11b. Setup for a 5V Input
R
VIN
1Ω
C
IN
*LTC3828EUH ONLY
3828 F11b
5V
C
INTVCC
4.7µF
+
LTC3828
INTV
CC
V
IN
DRV
CC*
Design Example
As a design example for one channel, assume V
IN
=
12V(nominal), V
IN
= 22V(max), V
OUT
= 1.8V, I
MAX
= 5A
and f = 300kHz.
The inductance value is chosen fi rst based on a 30% ripple
current assumption. The highest value of ripple current