Datasheet

LTC3823
19
3823fd
the load current and the type of MOSFET used, users need
to be careful to optimize the dead time for their particular
applications. Figure 11 shows the relation between the TG
Low BG High dead time by varying the Z0 voltages. For
an application using LTC3823 with load current of 5A and
IR7811W MOSFETs, the dead time could be optimized. To
make sure that there is no shoot-through under all condi-
tions, a dead time of 70ns is selected. This corresponds to
a DC voltage about 2.4V on Z0 pin. This voltage can easily
be generated with a resistor divider off INTV
CC
.
APPLICATIONS INFORMATION
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is signifi -
cant at input voltages above 20V and can be estimated
from:
Transition Loss ≅ (1.7A
–1
) V
IN
2
I
OUT
C
RSS
f
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents.
4. C
IN
loss. The input capacitor has the diffi cult job of
fi ltering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I
2
R loss
and suffi cient capacitance to prevent the RMS current
from causing additional upstream losses in fuses or
batteries.
Other losses, including C
OUT
ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve effi ciency, the input
current is the best indicator of changes in effi ciency. If you
make a change and the input current decreases, then the
effi ciency has increased. If there is no change in input
current, then there is no change in effi ciency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to ΔI
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
. ΔI
LOAD
also begins to charge or dis-
charge C
OUT
generating a feedback error signal used by the
regulator to return V
OUT
to its steady-state value. During
this recovery time, V
OUT
can be monitored for overshoot
or ringing that would indicate a stability problem. The I
TH
pin external components shown in Figure 12 will provide
adequate compensation for most applications. For a
detailed explanation of switching control loop theory see
Application Note 76.
Z0 VOLTAGE (V)
0
TG LOW TO BG HIGH DEADTIME (ns)
120
160
200
4
3823 F11
80
40
100
140
180
60
20
0
10.5
21.5
3 3.5 4.5
2.5
5
I
OUT
= 2A
FIGURE 12 CIRCUIT
Figure 11. TG Low BG High Dead Time vs Z0 Voltage
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3823 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
effi ciency to drop at high output currents. In continuous
mode the average output current fl ows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same R
DS(ON)
, then
the resistance of one MOSFET can simply be summed
with the resistances of L and the board traces to obtain
the DC I
2
R loss. For example, if R
DS(ON)
= 0.01Ω and
R
L
= 0.005Ω, the loss will range from 15mW to 1.5W
as the output current varies from 1A to 10A.