Datasheet

LTC3822-1
6
38221f
PIN FUNCTIONS
PLLLPF (Pin 1/Pin 2): This pin serves as the frequency
select input and PLL lowpass fi lter compensation point.
When SYNC/MODE has a DC voltage on it, tying this pin
to GND selects 300kHz operation; tying this pin to V
IN
selects 750kHz operation. Floating this pin selects 550kHz
operation. When SYNC/MODE has a clock applied to it,
connect an R-C network from this pin to ground.
SYNC/MODE (Pin 2/Pin 3): This pin performs two func-
tions: 1) external clock synchronization input for phase-
locked loop and 2) Burst Mode, pulse skipping or forced
continuous mode select. Applying a clock with frequency
between 250kHz and 750kHz causes the internal oscilla-
tor to phase-lock to the external clock and disables Burst
Mode operation, but allows pulse skipping at low load
currents.
To select Burst Mode operation at light loads, tie this
pin to V
IN
. Grounding this pin selects forced continuous
operation, which allows the inductor current to reverse.
Tying this pin to a voltage greater than 0.4V and less than
1.2V selects pulse skipping mode. In these cases, the
frequency of the internal oscillator is set by the voltage
on the PLLLPF pin.
TRACK/SS (Pin 3/Pin 5): Tracking Input for the Control-
ler or Optional External Soft-Start Input. This pin allows
the start-up of V
OUT
to “track” the external voltage at this
pin using an external resistor divider. The LTC3822-1
regulates the V
FB
voltage to the smaller of 0.6V or the
voltage on the TRACK/SS pin. An internal 1µA pull-up
current source is connected to this pin. Tying this pin to
V
IN
allows V
OUT
start-up with the internal 1ms soft-start
clamp. An external soft-start can be programmed by con-
necting a capacitor between this pin and ground. Do not
leave this pin fl oating.
V
FB
(Pin 4/Pin 6): Feedback Pin. This pin receives the
remotely sensed feedback voltage for the controller from
an external resistor divider across the output.
I
TH
(Pin 5/Pin 7): Current Threshold and Error Amplifi er
Compensation Point. Nominal operating range on this pin
is from 0.7V to 2V. The voltage on this pin determines the
threshold of the main current comparator.
RUN (Pin 6/Pin 8): Run Control Input. Forcing this pin
below 1.1V shuts down the chip. Driving this pin to V
IN
or releasing this pin enables the chip to start-up.
IPRG (Pin 7/Pin 10): Three-State Pin to Select the Maxi-
mum Peak Sense Voltage Threshold. This pin selects the
maximum allowed voltage drop between the V
IN
and SW
pins (i.e., the maximum allowed drop across the external
topside MOSFET). Tie to V
IN
, GND or fl oat to select 200mV,
82mV or 125mV respectively.
(DD/GN)
TYPICAL PERFORMANCE CHARACTERISTICS
T
A
= 25°C unless otherwise noted.
Pulse Skip Mode Operation Burst Mode Operation
V
OUT
20mV/DIV
AC COUPLED
I
L
2A/DIV
V
SW
2V/DIV
FIGURE 10 CIRCUIT
V
IN
= 3.3V
V
OUT
= 1.8V, 100mA
2µs/DIV
38221 G18
V
OUT
20mV/DIV
AC COUPLED
I
L
2A/DIV
V
SW
2V/DIV
FIGURE 10 CIRCUIT
V
IN
= 3.3V
V
OUT
= 1.8V, 100mA
10µs/DIV
38221 G19