Datasheet

LTC3813
27
3813fb
If the external frequency (f
SYNC
) is greater than the oscil-
lator frequency f
O
, current is sourced continuously, pull-
ing up the PLL/LPF pin. When the external frequency is
less than f
O
, current is sunk continuously, pulling down
the PLL/LPF pin. If the external and internal frequencies
are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to
the phase difference. Thus the voltage on the PLL/LPF
pin is adjusted until the phase and frequency of the external
and internal oscillators are identical. At this stable operating
point the phase comparator output is open and the fi lter
capacitor C
LP
holds the voltage. The LTC3813 SYNC pin
must be driven from a low impedance source such as a
logic gate located close to the pin.
The loop fi lter components (C
LP
, R
LP
) smooth out the
current pulses from the phase detector and provide a
stable input to the voltage controlled oscillator. The fi lter
components C
LP
and R
LP
determine how fast the loop
acquires lock. Typically R
LP
= 10kΩ and C
LP
is 0.01μF
to 0.1μF.
Pin Clearance/Creepage Considerations
The LTC3813 is available in the G28 package which
has 0.0106" spacing between adjacent pins. To
maximize PC board trace clearance between high volt-
age pins, the LTC3813 has three unconnected pins
between all adjacent high voltage and low voltage
pins, providing 4(0.0106") = 0.042" clearance which
will be suffi cient for most applications up to 100V.
For more information, refer to the printed circuit board
design standards described in IPC-2221 (www.ipc.org).
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3813 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause
the effi ciency to drop at high input currents. The input
current is maximum at maximum output current and
minimum input voltage. The average input current fl ows
through L, but is chopped between the top and bottom
MOSFETs. If the two MOSFETs have approximately the
same R
DS(ON)
, then the resistance of one MOSFET can
simply be summed with the resistances of L and the
board traces to obtain the DC I
2
R loss. For example, if
R
DS(ON)
= 0.01Ω and R
L
= 0.005Ω, the loss will range
from 15mW to 1.5W as the input current varies from
1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the bottom MOSFET spends in the saturated
region during switch node transitions. It depends upon
the output voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss
is signifi cant at output voltages above 20V and can be
estimated from the second term of the P
MAIN
equa-
tion found in the Power MOSFET Selection section.
When transition losses are signifi cant, effi ciency can
be improved by lowering the frequency and/or using a
bottom MOSFET(s) with lower C
RSS
at the expense of
higher R
DS(ON)
.
3. INTV
CC
/DRV
CC
current. This is the sum of the MOSFET
driver and control currents. Control current is typically
about 3mA and driver current can be calculated by:
I
GATE
= f(Q
G(TOP)
+ Q
G(BOT)
), where Q
G(TOP)
and Q
G(BOT)
are the gate charges of the top and bottom MOSFETs.
This loss is proportional to the supply voltage that
INTV
CC
/DRV
CC
is derived from, i.e., V
IN
, V
OUT
or an
external supply connected to INTV
CC
/DRV
CC
.
4. C
OUT
loss. The output capacitor has the diffi cult job
of fi l
tering the large RMS input current out of the syn-
chronous MOSFET. It must have a very low ESR to
minimize the AC I
2
R loss .
Other losses, including C
IN
ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss. When
making adjustments to improve effi ciency, the input cur-
rent is the best indicator of changes in effi ciency. If you
make a change and the input current decreases, then the
effi ciency has increased. If there is no change in input
current, then there is no change in effi ciency.
APPLICATIONS INFORMATION