Datasheet

LTC3810
32
3810fc
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
load step occurs, V
OUT
immediately shifts by an amount
equal to ∆I
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
. ∆I
LOAD
also begins to charge or dis-
charge C
OUT
generating a feedback error signal used by the
regulator to return V
OUT
to its steady-state value. During
this recovery time, V
OUT
can be monitored for overshoot
or ringing that would indicate a stability problem.
Design Example
As a design example, take a supply with the following
specifi cations: V
IN
= 36V to 72V (48V nominal), V
OUT
=
12V ±5%, I
OUT(MAX)
= 10A, f = 250kHz. First, calculate the
timing resistor with V
ON
= INTV
CC
:
R
ON
=
12V
2.4V • 250kHz • 76pF
= 263k
and choose the inductor for about 40% ripple current at
the maximum V
IN
:
L =
12V
250kHz • 0.4 • 10A
1
12V
72V






= 10μH
With a 10μH inductor, ripple current will vary from 3.2A
to 4A (32% to 40%) over the input supply range.
Next, choose the bottom MOSFET switch. Since the drain
of the MOSFET will see the full supply voltage 72V(max)
plus any ringing, choose an 80V MOSFET to provide a
margin of safety. The Si7852DP has:
BV
DSS
= 80V
R
DS(ON)
= 16.5mΩ(max)/13.5mΩ(nom),
θ
= 0.007/°C,
C
MILLER
= (18.5nC – 7nC)/40V = 288pF,
V
GS(MILLER)
= 4.7V,
θ
JA
= 20°C/W.
This yields a nominal sense voltage of:
V
SNS(NOM)
= 10A • 1.3 • 0.0135Ω = 176mV
To guarantee proper current limit at worst-case conditions,
increase nominal V
SNS
by at least 50% to 320mV (by tying
V
RNG
to 2V). To check if the current limit is acceptable at
V
SNS
= 320mV, assume a junction temperature of about
80°C above a 70°C ambient (ρ
150°C
= 2):
I
LIMIT

320mV
2 • 0.0165
+
1
2
•4A= 11.7A
and double-check the assumed T
J
in the MOSFET:
P
BOT
=
72V  12V
72V
• 11.7A
2
• 2 • 0.0165 = 3.8W
T
J
= 70°C + 3.8W • 20°C/W = 146°C
Verify that the Si7852DP is also a good choice for the
top MOSFET by checking its power dissipation at current
limit and maximum input voltage, assuming a junction
temperature of 50°C above a 70°C ambient (ρ
120°C
= 1.7):
P
MAIN
=
12V
72V
• 11.7A
2
1.7 • 0.0165
()
+ 72V
2
•
11.7A
2
•2 • 288pF
•
1
10V  4.7V
+
1
4.7V






• 250kHz
= 0.64W + 1.75W = 2.39W
T
J
= 70°C + 2.39W • 20°C/W = 118°C
The junction temperature will be signifi cantly less at
nominal current, but this analysis shows that careful at-
tention to heat sinking on the board will be necessary in
this circuit.
Since V
OUT
> 6.7V, the INTV
CC
/DRV
CC
voltage can be
generated from V
OUT
with the internal LDO by connecting
V
OUT
to the EXTV
CC
pin. A small SOT23 MOSFET such as
the ZXMN10A07F can be used for the pass device if fault
timeout is enabled. Choose R
NDRV
to guarantee that fault
timeout is enabled when power dissipation of M3 exceeds
0.4W (max for 70°C ambient). Calculate power dissipation
at V
IN(MIN)
= 36V:
I
CC
= 250kHz • 2 • 34nC + 3mA = 20mA
P
M3
= (36V – 10V)(0.02A) = 0.52W
APPLICATIONS INFORMATION
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