Datasheet

LTC3809
20
3809fc
APPLICATIONS INFORMATION
equal to (ΔI
LOAD
) • (ESR), where ESR is the effective se-
ries resistance of C
OUT
. ΔI
LOAD
also begins to charge or
discharge C
OUT
generating a feedback error signal used
by the regulator to return V
OUT
to its steady-state value.
During this recovery time, V
OUT
can be monitored for
overshoot or ringing that would indicate a stability problem.
OPTI-LOOP compensation allows the transient response
to be optimized over a wide range of output capacitance
and ESR values.
The I
TH
series R
C
-C
C
fi lter (see Functional Diagram) sets
the dominant pole-zero loop compensation.
The I
TH
external components showed in the fi gure on the
fi rst page of this data sheet will provide adequate compen-
sation for most applications. The values can be modifi ed
slightly (from 0.2 to 5 times their suggested values) to
optimize transient response once the fi nal PC layout is done
and the particular output capacitor type and value have
been determined. The output capacitor needs to be decided
upon because the various types and values determine the
loop feedback factor gain and phase. An output current
pulse of 20% to 100% of full load current having a rise
time of 1μs to 10μs will produce output voltage and I
TH
pin waveforms that will give a sense of the overall loop
stability. The gain of the loop will be increased by increas-
ing R
C
and the bandwidth of the loop will be increased
by decreasing C
C
. The output voltage settling behavior is
related to the stability of the closed-loop system and will
demonstrate the actual overall supply performance. For
a detailed explanation of optimizing the compensation
components, including a review of control loop theory,
refer to Application Note 76.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25) • (C
LOAD
).
Thus a 10μF capacitor would be require a 250μs rise time,
limiting the charging current to about 200mA.
Design Example
As a design example, assume V
IN
will be operating from a
maximum of 4.2V down to a minimum of 2.75V (powered
by a single lithium-ion battery). Load current requirement
is a maximum of 2A, but most of the time it will be in a
standby mode requiring only 2mA. Effi ciency at both low
and h ig h l oa d c urr en ts is im por t a nt . Bu rs t M od e o per atio n
at light loads is desired. Output voltage is 1.8V. The IPRG
pin will be left fl oating, so the maximum current sense
threshold ΔV
SENSE(MAX)
is approximately 125mV.
MaximumDuty Cycle
V
V
OUT
IN MIN
=
()
.%= 65 5
From Figure 1, SF = 82%.
RSF
V
I
DS ON MAX
SENSE MAX
OUT MAX T
()
()
()
•.• •
•
.=
Δ
=Ω
5
6
09 0032
ρ
A 0.032Ω P-channel MOSFET in Si7540DP is close to
this value.
The N-channel MOSFET in Si7540DP has 0.017Ω R
DS(ON)
.
The short circuit current is:
I
mV
A
SC
=
Ω
=
90
0 017
53
.
.
So the inductor current rating should be higher than
5.3A.
The PLLLPF pin will be left fl oating, so the LTC3809 will
operate at its default frequency of 550kHz. For continuous
Burst Mode operation with 600mA I
RIPPLE
, the required
minimum inductor value is:
L
V
kHz mA
V
V
H
MIN
=−
⎛
⎝
⎜
⎞
⎠
⎟
=μ
18
550 600
1
18
275
188
.
•
•
.
.
.
A 6A 2.2μH inductor works well for this application.
C
IN
will require an RMS current rating of at least 1A at
temperature. A C
OUT
with 0.1Ω ESR will cause approxi-
mately 60mV output ripple.