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LTC3809

3809fc

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

No R

SENSE

™, Low EMI,

Synchronous DC/DC Controller

The LTC

3809 is a synchronous step-down switching regu-

lator controller that drives external complementary power

MOSFETs using few external components. The constant

frequency current mode architecture with MOSFET V

sensing eliminates the need for a current sense resistor

and improves efﬁ ciency.

For noise sensitive applications, the LTC3809 can be exter-

nally synchronized from 250kHz to 750kHz. Burst Mode is

inhibited during synchronization or when the SYNC/MODE

pin is pulled low to reduce noise and RF interference. To

further reduce EMI, the LTC3809 incorporates a novel

spread spectrum frequency modulation technique.

Burst Mode operation provides high efﬁ ciency operation

at light loads. 100% duty cycle provides low dropout

operation, extending operating time in battery-powered

systems.

The switching frequency can be programmed up to 750kHz,

allowing the use of small surface mount inductors and

capacitors.

The LTC3809 is available in tiny footprint thermally

enhanced DFN and 10-lead MSOP packages.

High Efﬁ ciency, 550kHz Step-Down Converter

No Current Sense Resistor Required

Selectable Spread Spectrum Frequency Modulation

for Low Noise Operation

Constant Frequency Current Mode Operation for

Excellent Line and Load Transient Response

True PLL for Frequency Locking or Adjustment

(Frequency Range: 250kHz to 750kHz)

Wide V

Range: 2.75V to 9.8V

Wide V

OUT

Range: 0.6V to V

0.6V ±1.5% Reference

Low Dropout Operation: 100% Duty Cycle

Selectable Burst Mode

/Pulse-Skipping/Forced

Continuous Operation

Auxiliary Winding Regulation

Internal Soft-Start Circuitry

Output Overvoltage Protection

Micropower Shutdown: I

= 9μA

Tiny Thermally Enhanced Leadless (3mm × 3mm)

DFN and 10-lead MSOP Packages

1- or 2-Cell Lithium-Ion Powered Devices

Portable Instruments

Distributed DC Power Systems

L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.

No R

SENSE

is a trademark of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 5481178, 5929620, 6580258, 6304066, 5847554,

6611131, 6498466. Other Patents pending.

LTC3809

2.2μH

10μF

2.75V TO 9.8V

OUT

2.5V

47μF

3809 TA01

15k

59k

187k

470pF

GND

PLLLPF

SYNC/MODE

RUN

IPRG

LOAD CURRENT (mA)

EFFICIENCY (%)

100

POWER LOSS (mW)

10k

100

0.1

1 100 1000 10000

3809 TA01b

= 3.3V

= 5V

= 4.2V

FIGURE 10 CIRCUIT

OUT

= 2.5V

POWER LOSS

= 4.2V

EFFICIENCY

Efﬁ ciency and Power Loss vs Load Current

Summary of content (24 pages)

PAGE 1
LTC3809 No RSENSE™, Low EMI, Synchronous DC/DC Controller DESCRIPTION FEATURES n n n n n n n n n n n n n n No Current Sense Resistor Required Selectable Spread Spectrum Frequency Modulation for Low Noise Operation Constant Frequency Current Mode Operation for Excellent Line and Load Transient Response True PLL for Frequency Locking or Adjustment (Frequency Range: 250kHz to 750kHz) Wide VIN Range: 2.75V to 9.8V Wide VOUT Range: 0.6V to VIN 0.6V ±1.
PAGE 2
LTC3809 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (VIN) ........................ –0.3V to 10V PLLLPF, RUN, SYNC/MODE, IPRG Voltages ............................... –0.3V to (VIN + 0.3V) VFB , ITH Voltages ...................................... –0.3V to 2.4V SW Voltage ......................... –2V to VIN + 1V (10V Max) TG, BG Peak Output Current (<10μs) ......................... 1A Operating Temperature Range (Note 2)....–40°C to 85°C Storage Temperature Range...................
PAGE 3
LTC3809 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VIN = 4.2V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS 350 105 9 3 500 150 20 10 μA μA μA μA 2.55 2.75 V V Main Control Loops Input DC Supply Current Normal Operation Sleep Mode Shutdown UVLO (Note 4) Undervoltage Lockout Threshold (UVLO) VIN Falling VIN Rising l l 1.95 2.15 2.25 2.45 0.8 1.1 1.
PAGE 4
LTC3809 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted. Efﬁciency vs Load Current FIGURE 10 CIRCUIT FIGURE 10 CIRCUIT 95 VIN = 5V, VOUT = 2.5V 95 EFFICIENCY (%) EFFICIENCY (%) 85 VOUT = 1.2V 80 VOUT = 1.8V 75 85 BURST MODE (SYNC/MODE = VIN) 80 75 70 65 70 FORCED CONTINUOUS (SYNC/MODE = 0V) 60 65 SYNC/MODE = VIN VIN = 5V 60 1 10 100 1k LOAD CURRENT (mA) 10k 40 20 –20 50 1 10 100 1k LOAD CURRENT (mA) 3809 G01 10k 0.5 1 1.
PAGE 5
LTC3809 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted. Regulated Feedback Voltage vs Temperature Undervoltage Lockout Threshold vs Temperature 2.55 0.606 1.20 2.50 0.604 VIN RISING 1.15 0.602 0.600 0.598 RUN VOLTAGE (V) 2.45 INPUT VOLTAGE (V) FEEDBACK VOLTAGE (V) Shutdown (RUN) Threshold vs Temperature 2.40 2.35 2.30 VIN FALLING 1.10 1.05 2.25 0.596 2.20 0.594 –60 –40 –20 0 20 40 60 TEMPERATURE (°C) 80 2.
PAGE 6
LTC3809 PIN FUNCTIONS PLLLPF (Pin 1): Frequency Set/PLL Lowpass Filter. When synchronizing to an external clock, this pin serves as the lowpass ﬁlter point for the phase-locked loop. Normally, a series RC is connected between this pin and ground. RUN (Pin 5): Run Control Input. Forcing this pin below 1.1V shuts down the chip. Driving this pin to VIN or releasing this pin enables the chip to start-up with the internal soft-start.
PAGE 7
LTC3809 FUNCTIONAL DIAGRAM VIN CIN 9 VIN VOLTAGE REFERENCE VREF 0.6V 6 IPRG SLOPE CLK + UNDERVOLTAGE LOCKOUT 8 Q R ICMP SENSE+ S VIN ANTI-SHOOTTHROUGH 5 7 RUN + t = 1ms INTERNAL SOFT-START 0.15V – 2 CLOCK DETECT 0.4V – 0.68V RB BURSTDIS FCB PHASE DETECTOR + 0.54V – VFB UV + 2.6μA MN + 0.3V SYNC/MODE BURST DEFEAT BG OV BURSTDIS GND VOUT FCB SLEEP IREV SS L SW COUT UVSD VIN 11 10 PVIN VIN 0.
PAGE 8
LTC3809 OPERATION (Refer to Functional Diagram) Main Control Loop The LTC3809 uses a constant frequency, current mode architecture. During normal operation, the top external P-channel power MOSFET is turned on when the clock sets the RS latch, and is turned off when the current comparator (ICMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is determined by the voltage on the ITH pin, which is driven by the output of the error ampliﬁer (EAMP).
PAGE 9
LTC3809 OPERATION (Refer to Functional Diagram) The reverse current comparator RICMP senses the drain-tosource voltage of the bottom external N-channel MOSFET. This MOSFET is turned off just before the inductor current reaches zero, preventing it from going negative. In forced continuous operation, the inductor current is allowed to reverse at light loads or under large transient conditions. The peak inductor current is determined by the voltage on the ITH pin.
PAGE 10
LTC3809 OPERATION (Refer to Functional Diagram) Frequency Selection and Phase-Locked Loop (PLLLPF and SYNC/MODE Pins) The selection of switching frequency is a tradeoff between efﬁciency and component size. Low frequency operation increases efﬁciency by reducing MOSFET switching losses, but requires larger inductance and/or capacitance to maintain low output ripple voltage. The switching frequency of the LTC3809’s controllers can be selected using the PLLLPF pin.
PAGE 11
LTC3809 OPERATION (Refer to Functional Diagram) Peak Current Sense Voltage Selection and Slope Compensation (IPRG Pin) When the LTC3809 controller is operating below 20% duty cycle, the peak current sense voltage (between the VIN and SW pins) allowed across the external P-channel MOSFET is determined by: ΔVSENSE(MAX) = A • VITH – 0.7 V 10 where A is a constant determined by the state of the IPRG pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN selects A = 5/3; tying IPRG to GND selects A = 2/3.
PAGE 12
LTC3809 APPLICATIONS INFORMATION The typical LTC3809 application circuit is shown in Figure 10. External component selection for the controller is driven by the load requirement and begins with the selection of the inductor and the power MOSFETs. Power MOSFET Selection The LTC3809’s controller requires two external power MOSFETs: a P-channel MOSFET for the topside (main) switch and a N-channel MOSFET for the bottom (synchronous) switch.
PAGE 13
LTC3809 APPLICATIONS INFORMATION VOUT VIN V –V Bottom N-Channel Duty Cycle = IN OUT VIN 2.0 RT NORMALIZED ON RESISTANCE Top P-Channel Duty Cycle = 1.5 1.0 The MOSFET power dissipations at maximum output current are: 0.5 0 –50 50 100 0 JUNCTION TEMPERATURE (°C) Figure 2. RDS(ON) vs Temperature short-circuit current sense threshold ΔVSC is set approximately 90mV when IPRG is ﬂoating (60mV when IPRG is tied low; 150mV when IPRG is tied high).
PAGE 14
LTC3809 APPLICATIONS INFORMATION that do not work well at high input voltages (e.g., VIN > 5V) may work ﬁne at lower voltages (e.g., 3.3V). Selecting the N-channel MOSFET is typically easier, since for a given RDS(ON), the gate charge and turn-on and turn-off delays are much smaller than for a P-channel MOSFET. Operating Frequency and Synchronization The choice of operating frequency, fOSC, is a trade-off between efﬁciency and component size.
PAGE 15
LTC3809 APPLICATIONS INFORMATION size for a ﬁxed inductor value, but is very dependent on the inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. sized for the maximum RMS current must be used.
PAGE 16
LTC3809 APPLICATIONS INFORMATION is an edge sensitive digital type that provides zero degrees phase shift between the external and internal oscillators. This type of phase detector does not exhibit false lock to harmonics of the external clock. LTC3809 RB CFF VFB RA 3809 F03 Figure 3. Settling Output Voltage For most applications, a 59k resistor is suggested for RA. In applications where minimizing the quiescent current is critical, RA should be made bigger to limit the feedback divider current.
PAGE 17
LTC3809 APPLICATIONS INFORMATION If the external clock frequency is greater than the internal oscillator’s frequency, fOSC, then current is sourced continuously from the phase detector output, pulling up the PLLLPF pin. When the external clock frequency is less than fOSC, current is sunk continuously, pulling down the PLLLPF pin. If the external and internal frequencies are the same but exhibit a phase difference, the current sources turn on for an amount of time corresponding to the phase difference.
PAGE 18
LTC3809 APPLICATIONS INFORMATION can be lowered and distributed to other frequencies and their harmonics by modulating the PWM frequency. The LTC3809’s switching noise (at 550kHz) is spread between 460kHz and 635kHz in spread spectrum modulation operation. Figure 8 shows the spectral plots of the output (VOUT) noise with/without spread spectrum modulation. Note the signiﬁcant reduction in peak output noise (>20dBm).
PAGE 19
LTC3809 APPLICATIONS INFORMATION limiting efﬁciency and which change would produce the most improvement. Efﬁciency can be expressed as: NORMALIZED VOLTAGE OR CURRENT (%) 105 VREF 100 Efﬁciency = 100% – (L1 + L2 + L3 + …) 95 MAXIMUM SENSE VOLTAGE where L1, L2, etc. are the individual losses as a percentage of input power. 90 85 80 75 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 INPUT VOLTAGE (V) 3809 F09 Figure 9.
PAGE 20
LTC3809 APPLICATIONS INFORMATION equal to (ΔILOAD) • (ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. OPTI-LOOP compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values.
PAGE 21
LTC3809 APPLICATIONS INFORMATION PC Board Layout Checklist When laying out the printed circuit board, use the following checklist to ensure proper operation of the LTC3809. • The power loop (input capacitor, MOSFET, inductor, output capacitor) should be as small as possible and isolated as much as possible from LTC3809. • The current sense traces should be Kelvin connections right at the P-channel MOSFET source and drain.
PAGE 22
LTC3809 TYPICAL APPLICATIONS DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) 0.675 p0.05 3.50 p0.05 1.65 p0.05 2.15 p0.05 (2 SIDES) PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC 2.38 p0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 3.00 p0.10 (4 SIDES) 0.38 p 0.10 10 1.65 p 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) (DD10) DFN 1103 5 0.200 REF 1 0.25 p 0.05 0.50 BSC 0.75 p0.05 0.00 – 0.05 2.38 p0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1.
PAGE 23
LTC3809 PACKAGE DESCRIPTION MSE Package 10-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1664 Rev C) BOTTOM VIEW OF EXPOSED PAD OPTION 2.794 p 0.102 (.110 p .004) 5.23 (.206) MIN 0.889 p 0.127 (.035 p .005) 1 0.05 REF 10 DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 3.00 p 0.102 (.118 p .004) (NOTE 3) 10 9 8 7 6 DETAIL “A” 0o – 6o TYP 1 2 3 4 5 GAUGE PLANE 0.53 p 0.152 (.021 p .006) DETAIL “A” 0.18 (.007) 0.497 p 0.
PAGE 24
LTC3809 TYPICAL APPLICATION Synchronous DC/DC Converter with Spread Spectrum Modulation 300k 2 SYNCH/MODE 9 VIN 3.3V LTC3809EDD 1000pF 1 2200pF 100pF 6 15k 470pF VIN CIN 22μF 4 187k 3 TG PLLLPF IPRG SW ITH VFB BG GND 59k RUN 8 MP Si3447BDV 10 7 5 L 1.5μH VOUT 2.