Datasheet

LTC3789
9
3789fa
pin FuncTions
(SSOP/QFN)
V
FB
(Pin 1/Pin 26): Error Amplifier Feedback Pin. Receives
the feedback voltage for the controller from an external
resistive divider across the output.
SS (Pin 2/Pin 27): External Soft-Start Input. The LTC3789
regulates the V
FB
voltage to the smaller of 0.8V or the
voltage on the SS pin. A internalA pull-up current
source is connected to this pin. A capacitor to ground
at this pin sets the ramp time to final regulated output
voltage.
SENSE
+
(Pin 3/Pin 28): The (+) Input to the Current Sense
Comparator. The I
TH
pin voltage and controlled offsets
between the SENSE
and SENSE
+
pins, in conjunction
with R
SENSE
, set the current trip threshold.
SENSE
(Pin 4/Pin 1): The (–) Input to the Current Sense
Comparator.
I
TH
(Pin 5/Pin 2): Error Amplifier Output and Switch-
ing Regulator Compensation Point. The channels
current comparator trip point increases with this control
voltage.
SGND (Pin 6/Pins 3, Exposed Pad Pin 29): Small
Signal Ground. Must be routed separately from high
current grounds to the common (–) terminals of the
C
IN
capacitors. In the QFN package, the exposed pad
is SGND. It must be soldered to PCB ground for rated
thermal performance.
MODE/PLLIN (Pin 7/Pin 4): Mode Selection or External
Synchronization Input to Phase Detector. This is a dual-
purpose pin. When external frequency synchronization
is not used, this pin selects the operating mode. The
pin can be tied to SGND or INTV
CC
. SGND or below
0.8V enables forced continuous mode. INTV
CC
enables
pulse-skipping mode. For external sync, apply a clock
signal to this pin. The internal PLL will synchronize the
internal oscillator to the clock, and forced continuous
mode will be enabled. The PLL composition network is
integrated into the IC.
FREQ (Pin 8/Pin 5): Frequency Set Pin. There is a precision
10µA current flowing out of this pin. A resistor to ground
sets a voltage which, in turn, programs the frequency.
Alternatively, this pin can be driven with a DC voltage to
vary the frequency of the internal oscillator.
RUN (Pin 9/Pin 6): Run Control Input. Forcing the pin
below 0.5V shuts down the controller, reducing quies-
cent current. There are 1.2µA pull-up currents for this
pin. Once the RUN pin rises above 1.22V, the IC is turned
on, and an additionalA pull-up current is added to
the pin.
V
INSNS
(Pin 10/Pin 7): V
IN
Sense Input to the Buck-Boost
Transition Comparator. Connect this pin to the drain of the
top N-channel MOSFET on the input side.
V
OUTSNS
(Pin 11/Pin 8): V
OUT
Sense Input to the Buck-
Boost Transition Comparator. Connect this pin to the drain
of the top N-channel MOSFET on the output side.
I
LIM
(Pin 12/Pin 9): Input/Output Average Current
Sense Range Input. This pin tied to SGND, INTV
CC
or
left floating, sets the maximum average current sense
threshold.
I
OSENSE
+
(Pin 13/Pin 10): The (+) Input to the Input/Output
Average Current Sense Amplifier.
I
OSENSE
(Pin 14/Pin 11): The (–) Input to the Input/Output
Average Current Sense Amplifier.
TRIM (Pin 15/Pin 12): Tie this pin to GND for normal
operation. Do not allow this pin to float.
EXTV
CC
(Pin 20/Pin 17): External Power Input to an
Internal LDO Connected to INTV
CC
. This LDO supplies
INTV
CC
power, bypassing the internal LDO powered from
V
IN
whenever EXTV
CC
is higher than 4.8V. See EXTV
CC
Connection in the Applications Information section. Do
not exceed 14V on this pin.