Datasheet

LTC3787
11
3787fc
BLOCK DIAGRAM
SLEEP
SWITCHING
LOGIC
AND
CHARGE
PUMP
+
–
4.8V
3.8V
VBIAS
V
IN
C
IN
INTV
CC
PLLIN/
MODE
PGOOD
+
–
1.32V
1.08V
+
–
–
–
+
–
+
VFB
EXTV
CC
5.4V
LDO
VCO
PFD
SW
0.425V
SENS LO
BOOST
TG
C
B
C
OUT
V
OUT
D
B
CLKOUT
PGND
BG
INTV
CC
VFB
S
R
Q
EA
1.32V
SS
1.2V
R
SENSE
0.5µA/
4.5µA
10µA
11V
SHDN
–
+
SHDN
2.5V
–
+
R
C
SS
SENS
LO
ITH
C
C
C
SS
C
C2
0.7V
2.8V
SLOPE COMP
2mV
+
–
–
+
SENSE
–
SENSE
+
SHDN
CLK2
CLK1
RUN
SGND
INTV
CC
FREQ
DUPLICATE FOR SECOND CONTROLLER CHANNEL
+
–
+
–
L
+
–
EN
5.4V
LDO
EN
20µA
100k
SYNC
DET
ILIM
PHASMD
OV
3787 BD
CURRENT
LIMIT
I
CMP
I
REV
OPERATION
Main Control Loop
The LTC3787 uses a constant-frequency, current mode
step-up architecture with the two controller channels
operating out of phase. During normal operation, each
external bottom MOSFET is turned on when the clock for
that channel sets the RS latch, and is turned off when the
main current comparator, ICMP, resets the RS latch. The
peak inductor current at which ICMP trips and resets the
latch is controlled by the voltage on the ITH pin, which is
the output of the error amplifier EA. The error amplifier
compares the output voltage feedback signal at the VFB
pin (which is generated with an external resistor divider
connected across the output voltage, V
OUT
, to ground), to
the internal 1.200V reference voltage. In a boost converter,
the required inductor current is determined by the load
current, V
IN
and V
OUT
. When the load current increases,
it causes a slight decrease in VFB relative to the reference,
which causes the EA to increase the ITH voltage until the
average inductor current in each channel matches the new
requirement based on the new load current.
After the bottom MOSFET is turned off each cycle, the
top MOSFET is turned on until either the inductor current
starts to reverse, as indicated by the current comparator,
IR, or the beginning of the next clock cycle.