Datasheet

LTC3785
8
3785fc
operaTion
MAIN CONTROL LOOP
The LTC3785 is a buck-boost voltage mode controller that
provides an output voltage above, equal to or below the
input voltage.
The LTC proprietary topology and control architecture also
employs drain-to-source sensing (No R
SENSE
) for forward
and reverse current limiting. The controller provides
all N-channel MOSFET output switch drive, facilitating
single package multiple power switch technology along
with lower R
DS(ON)
. The error amp output voltage (V
C
)
determines the output duty cycle of the switches. Since
the V
C
pin is a filtered signal, it provides rejection of high
frequency noise.
The FB pin receives the voltage feedback signal, which
is compared to the internal reference voltage by the er-
ror amplifier. The top MOSFET drivers are biased from a
floating bootstrap capacitor, which is normally recharged
during each off cycle through an external diode when the
top MOSFET turns off. Optional Schottky diodes can be
connected across synchronous switch B and D to provide
a lower drop during the dead time and eliminate efficiency
loss due to body diode reverse recovery.
The main control loop is shut down by pulling the RUN/
SS pin low. An internal 1µA current source charges the
RUN/SS pin and when the pin voltage is higher than 0.7V
the IC is enabled. The V
C
voltage is then clamped to the
RUN/SS voltage minus 0.7V while C
SS
is slowly charged
during start-up. This soft-start clamping prevents inrush
current draw from the input power supply.
P
OWER
SWITCH CONTROL
Figure 1 shows a simplified diagram of how the four power
switches are connected to the inductor, V
IN
, V
OUT
and GND.
Figure 2 shows the regions of operation for the LTC3785
as a function of duty cycle D. The power switches are
properly controlled so that the transfer between modes
is continuous.
Buck Region (V
IN
> V
OUT
)
Switch D is always on and switch C is always off during
buck mode. When the error amp output voltage, V
C
, is ap-
proximately above 0.1V, output A begins to switch. During
the off time of switch A, synchronous switch B turns on for
the remainder of the switching period. Switches A and B will
alternate similar to a typical synchronous buck regulator.
As the control voltage increases, the duty cycle of switch
A increases until the max duty cycle of the converter in
buck mode reaches D
MAX_BUCK
, given by:
D
MAX_BUCK
= 100 – D4(SW)%
where D4(SW) = duty cycle % of the four switch range.
D4(SW) = (300ns • f) • 100%
where f = operating frequency, Hz.
Beyond this point the four switch or buck-boost region
is reached.
Buck-Boost or Four Switch (V
IN
~ V
OUT
)
When the error amp output voltage, V
C
, is above ap-
proximately 0.65V, switch pair AD remain on for duty
cycle D
MAX_BUCK
, and the switch pair AC begin to phase
in. As switch pair AC phases in, switch pair BD phases
out accordingly. When the V
C
voltage reaches the edge of
Figure 1. Output Switch Configuration
Figure 2. Operation Mode vs V
C
Voltage
SW2
BG1 C
3785 F01
SW1
B BG2
L
V
OUT
V
IN
TG1 D
A TG2
BOOST REGION
BUCK/BOOST REGIONFOUR SWITCH PWM
90%
D
MAX
BOOST
D
MIN
BOOST
A ON, B OFF
PWM C, D SWITCHES
BUCK REGION
D
MIN
BUCK
3785 F02
D
MAX
BUCK
D ON, C OFF
PWM A, B SWITCHES