Datasheet
18
LTC3778
3778f
Active Voltage Positioning
Active voltage positioning (also termed load “deregula-
tion” or droop) describes a technique where the output
voltage varies with load in a controlled manner. It is useful
in applications where rapid load steps are the main cause
of error in the output voltage. By positioning the output
voltage at or above the regulation point at zero load, and
below the regulation point at full load, one can use more
of the error budget for the load step. This allows one to
reduce the number of output capacitors by relaxing the
ESR requirement.
For example, in a 20A application, six 0.015Ω capacitors
are required in parallel to keep the output voltage within a
100mV tolerance:
±
Ω
()
=± =20
1
6
0 015 50 100AmVmV.
Using active voltage positioning, the same specification
can be met with only three capacitors. In this case, the load
step will cause an output voltage change of:
∆=
()
Ω
()
=VA mV
OUT STEP()
.20
1
3
0 015 100
APPLICATIO S I FOR ATIO
WUUU
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
RUN/SS
V
ON
PGOOD
V
RNG
I
TH
FCB
SGND
I
ON
V
FB
EXTV
CC
BOOST
TG
SW
SENSE
+
SENSE
–
PGND
BG
DRV
CC
INTV
CC
V
IN
LTC3778
+
M2
Si4874
M1
Si4884
L1, 1.8µH
D1
B340A
C
OUT1-2
180µF
4V
×2
C
OUT3
22µF
6.3V
X7R
C
IN
10µF
35V
×3
V
IN
5V TO 28V
V
OUT
2.5V
10A
C
SS
0.1µF
C
C1
500pF
C
ON
,
0.01µF
C
C2
100pF
C
VCC
4.7µF
C
F
0.1µF
C
B
0.22µF
R
C
20k
R1
12.7k
R
ON
400k
R2
40.2k
R
F
1Ω
D
B
CMDSH-3
3778 F07
C
IN
: UNITED CHEMICON THCR60EIHI06ZT
C
OUT1-2
: CORNELL DUBILIER ESRE181E04B
L1: SUMIDA CEP125-1R8MC-H
R
PG
100k
R3
11k
R4
39k
+
Figure 7. Design Example: 2.5V/10A at 250kHz
By positioning the output voltage at the regulation point at
no load, it will drop 100mV below the regulation point after
the load step. However, when the load disappears or the
output is stepped from 20A to 0A, the 100mV is recovered.
This way, a total of 100mV change is observed on V
OUT
in
all conditions, whereas a total of ±100mV or 200mV is
seen on V
OUT
without voltage positioning while using only
three output capacitors.
Implementing active voltage positioning requires setting a
precise gain between the sensed current and the output
voltage. Because of the variability of MOSFET on-resis-
tance, it is prudent to use a sense resistor with active
voltage positioning. In order to minimize power lost in this
resistor, a low value of 0.002Ω is chosen. The nominal
sense voltage will now be:
V
SNS(NOM)
= (0.002Ω)(20A) = 40mV
To maintain a reasonable current limit, the voltage on the
V
RNG
pin is reduced to 0.5V by connecting it to a resistor
divider from INTV
CC
, corresponding to a 50mV nominal
sense voltage.
Next, the gain of the LTC3778 error amplifier must be
determined. The change in I
TH
voltage for a corresponding
change in the output current is: