Datasheet

9
LTC3776
3776fa
OPERATIO
U
(Refer to Functional Diagram)
Main Control Loop
The LTC3776 uses a constant frequency, current mode
architecture with the two controllers operating 180 de-
grees out of phase. During normal operation, the top
external P-channel power MOSFET is turned on when the
clock for that channel sets the RS latch, and turned off
when the current comparator (I
CMP
) resets the latch. The
FU CTIO AL DIAGRA
U
U
W
(Controller 2)
Q
OV2
CLK2
SC2
SLOPE2
SW2
SENSE2
+
SHDN
S
R
RS2
ANTISHOOT
THROUGH
PGND
SENSE2
+
TG2
SENSE2
+
V
IN
V
OUT2
C
OUT2
MP2
MN2
BG2
40k
120k
40k
L2
PGND
V
FB2
I
TH2
R
ITH2
C
ITH2
V
REF
/8
SC2
SHORT1
V
FB2
/2
SW2
40k
V
REF
–
+
EAMP
–
+
–
+
ICMP
–
+
V
FB2
OV2
1.1 • V
REF
/2
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
SCP
3776 CONT2
–
+
OVP
peak inductor current at which I
CMP
resets the RS latch is
determined by the voltage on the I
TH
pin, which is driven
by the output of the error amplifier (EAMP). The V
FB
pin
receives the output voltage feedback signal from an exter-
nal resistor divider. This feedback signal is compared to a
reference (either the internal 0.6V reference for controller
1 or the divided down V
REF
pin for CH2) by the EAMP.