Datasheet

LTC3775
21
3775fa
C
MILLER
= Calculated Miller capacitance using the gate
charge curve from the MOSFET data sheet
f
SW
= Switching frequency
Both MOSFETs have conduction losses (I
2
R) while the
topside N-channel equation includes an additional term
for transition losses, which peak at the highest input volt-
age. For V
IN
< 12V, the high current effi ciency generally
improves with larger MOSFETs, while for V
IN
> 12V, the
transition losses rapidly increase to the point that the use
of a higher R
DS(ON)
device with lower C
MILLER
actually
provides higher effi ciency. The bottom MOSFET losses are
greatest at high input voltage when the top switch duty
factor is low or during a short circuit when the bottom
switch is on close to 100% of the period.
Schottky Diode Selection
An optional Schottky diode connected between the SW node
(cathode) and the source of the bottom MOSFET (anode)
conducts during the dead time between the conduction of
the power MOSFET switches. It is intended to prevent the
body diode of the bottom MOSFET from turning on and
storing a charge during the dead time, which can cause
a modest (about 1%) effi ciency loss. The diode can be
rated for about one half to one fi fth of the full load current
since it is on for only a fraction of the duty cycle. In order
for the diode to be effective, the inductance between it
and the bottom MOSFET must be as small as possible,
mandating that these components be placed next to each
other on the same layer of the PC board.
Input Capacitor Selection
The input bypass capacitor has three primary requirements:
its ESR must be low to minimize the supply drop when
the top MOSFETs turn on, its RMS current capability must
be adequate to withstand the ripple current at the input,
and its capacitance must be large enough to maintain the
input voltage until the input supply can respond. Generally,
a capacitor (particularly a non-ceramic type) that meets
the fi rst two parameters will have far more capacitance
than is required to keep capacitance-based droop under
control. The input capacitor’s voltage rating should be at
least 1.4 times the maximum input voltage.
In continuous mode, the source current of the top N-channel
MOSFET is approximately a square wave of duty cycle V
OUT
/
V
IN
. The maximum RMS capacitor current is given by:
II
VVV
V
RMS OUT MAX
OUT IN OUT
IN
≈
()
()
–
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is com-
monly used for design because even signifi cant deviations
do not offer much relief.
Note that capacitor manufacturer’s ripple current ratings
are often based on only 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose
a capacitor rated at a higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. Always consult the
manufacturer if there is any question.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used
as input capacitors, but each has drawbacks: ceramics
have high voltage coeffi cients of capacitance and may
have audible piezoelectric effects; tantalums need to be
surge-rated; OS-CONs suffer from higher inductance,
larger case size and limited surface mount applicability;
and electrolytics’ higher ESR and dryout may require
several to be used in parallel. Sanyo OS-CON SVP, SVPD
series; Sanyo POSCAP TQC series or aluminum electrolytic
capacitors from Panasonic WA series or Cornel Dublilier
SPV series, in parallel with a couple of high performance
ceramic capacitors, can be used as an effective means of
achieving low ESR and high bulk capacitance.
Output Capacitor Selection
The selection of C
OUT
is primarily determined by the ESR
required to minimize voltage ripple and load step transients.
The output ripple ΔV
OUT
is approximately bounded by:
V
OUT
I
L
ESR+
1
8•f
SW
•C
OUT






where ΔI
L
is the inductor ripple current.
APPLICATIONS INFORMATION