Datasheet

LTC3773
19
3773fb
age output current I
MAX
equal to the peak value less half
the peak-to-peak ripple current, ΔI
L
.
Allowing a margin for variations in the IC and external
component values yields:
R
SENSE
=
55mV
I
MAX
The IC works well with values of R
SENSE
from 0.002Ω to
0.1Ω.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at duty cycles greater than 50%. It is accomplished
internally by adding a compensating ramp to the inductor
current signal at duty cycles in excess of 40%. Normally,
at the maximum duty cycle, with slope compensation, the
maximum inductor peak current is reduced by more than
50%, reducing the maximum output current at high duty
cycle operation. However, the LTC3773’s slope compensa-
tion recovery is implemented to allow 70% rated inductor
peak current at the maximum duty cycle.
V
CC
and V
DR
Power Supplies
Power for the top and bottom MOSFET drivers is derived
from the V
DR
pin; the internal controller circuitry is derived
from the V
CC
pin. Under typical operating conditions, the
total current consumption at these two pins should be well
below 100mA. Hence, V
DR
and V
CC
can be connected to an
external auxiliary 5V power supply. If an auxiliary supply is
not available, a simple zener diode and a darlington NPN
buffer can be used to power these two pins as shown in
Figure 3. To prevent switching noise from coupling to the
sensitive analog control circuitry, V
CC
should have a 1μF
bypass capacitor, at least, close to the device. The BiCMOS
process that allows the LTC3773 to include large on-chip
MOSFET drivers also limits the maximum V
DR
and V
CC
voltage to 7V. This limits the practical maximum auxiliary
supply to a loosely regulated 7V rail. If V
CC
drops below
3.9V, LTC3773 goes into undervoltage lockout; if V
DR
drops below V
CC
by more than 1V, the driver outputs are
disabled.
Figure 3. LTC3773 V
CC
and V
DR
Power Supplies
Topside MOSFET Driver Supply (C
B
, D
B
)
External bootstrap capacitors, C
B
, connected to the
BOOST pins, supply the gate drive voltages for the topside
MOSFETs. Capacitor C
B
in Figure 3 is charged though diode
D
B
from V
DR
when the SW pin is low. When the topside
MOSFETs turns on, the driver places the C
B
voltage across
the gate-source of the desired MOSFET. This enhances
the MOSFET and turns on the topside switch. The switch
node voltage, SW, rises to V
IN
and the BOOST pin follows.
With the topside MOSFET on, the boost voltage is above
the input supply (V
BOOST
= V
DR
+ V
IN
). The value of the
boost capacitor C
B
needs to be 30 to 100 times that of the
total gate charge capacitance of the topside MOSFET(s)
as specifi ed on the manufacturer’s data sheet. The reverse
breakdown of D
B
must be greater than V
IN(MAX)
.
Regulator Output Voltage
The regulator output voltages are each set by an external
feedback resistive divider carefully placed across the output
capacitor. The resultant feedback signal is compared with
the internal precision 0.6V voltage reference by the error
amplifi er. The output voltage is given by the equation:
V
OUT
= 0.6V 1+
R2
R1






where R1 and R2 are defi ned in Figure 1.
+
+
+
+
V
OUT
V
IN
C
OUT
C
IN
BOOST
TG
SW
BG
V
DR
PGND
V
CC
LR
SENSE
QT
D1
D
B
C
B
QB
10μF
10μF
0.1μF
0.1μF
10Ω
100Ω
R
Z
2k
V
Z
6.8V
Q1
LTC3773
3773 F03
Q1: ZETEX FZT603
V
Z
: ON SEMI MM5Z6V8ST1
SGND
APPLICATIONS INFORMATION