Datasheet

LTC3766
51
3766fa
For more information www.linear.com/LTC3766
applicaTions inForMaTion
2. Plan the power/ground routing carefully. Know where
the large load switching current is coming from and
going to. Maintain three separate planes if possible:
signal ground (GND pin), power ground (PGND pin) and
power stage ground. The power ground plane should
be connected with a single via to the source of the SG
MOSFET. The signal ground plane should be connected
with a single via to the source of the SG MOSFET for
accurate V
DS
sensing. If resistor current sensing is used
for I
S
+
and I
S
–
, be careful to minimize the inductance
of the plane between the sense resistor and the source
of the SG MOSFET.
3. Mount a bypass capacitor as close as possible between
the V
CC
pin and the power ground plane.
4. Keep the copper traces between the driver output pins
and the MOSFET short and wide.
5. Keep the high current switching path on both the primary
and secondary as short as possible, using multiple lay
-
ers in parallel to further reduce parasitic inductance.
6.
If resistor sense mode is used, the I
S
+
and I
S
–
pins
must be Kelvin connected to the sense resistor. The
traces to the sense resistor must run side-by-side and
be shielded with signal ground on all sides.
7. Keep the switching nodes (SW, PT
+
, PT
–
, FG, SG) away
from noise sensitive nodes, especially FB, ITH, I
S
+
and
I
S
–
.
8. The voltage divider on the output should be connected
as close as possible to the load at the output terminal
of the power supply. The bottom of the voltage divider
should be tied to the signal ground plane. Use the dif
-
ferential amplifier to sense the load voltage and eliminate
distribution voltage drops.