Datasheet

LTC3766
42
3766fa
For more information www.linear.com/LTC3766
applicaTions inForMaTion
because no amount of tweaking to the ITH components can
cancel their effect. Also, any theoretical analysis of loop
response only considers first order non-ideal component
behavior. Consequently, it is important that a final stability
check be made with production layout and components.
Stabilizing the voltage loop of the LTC3766 is accomplished
by using the error amp to provide a gain from V
OUT
to
ITH that compensates for the control to output gain from
ITH to V
OUT
. The DC component of the ITH to V
OUT
gain
is approximately:
A
DC1
=
1
29.3R
SENSE
•
2Lf
SW
R
OUT
2Lf
SW
+R
OUT
for resistor sense mode, and:
A
DC1
=
N
P
2.2K
CT
N
S
R
SENSE
•
2Lf
SW
R
OUT
2Lf
SW
+R
OUT
for current transformer mode. Since the LTC3766 utilizes
current mode control, the ITH to V
OUT
transfer function
can be basically characterized by one pole and one zero.
The pole is given approximately by:
f
P
=
1
2πR
OUT
C
+
1
πf
SW
LC
and the zero is given by:
f
Z
=
1
2πR
ESR
C
where R
ESR
is the ESR of the output capacitance C. Note
that the frequency of this zero will vary substantially de-
pending on the type of capacitor chosen.
The L
TC3766 uses i
nternal slope compensation to stabilize
the current loop. The amount of slope that is effectively
seen at the current sense (I
S
+
) input is:
S
R
= Kf
SW
(26mV)
for R
SENSE
mode and:
S
R
= Kf
SW
(0.35V)
for current transformer mode, where K = 1 for duty cycles
less than 50% and K = 2 for duty cycles greater than 50%.
For most applications, this internal slope compensation will
be on the order of the down slope of the inductor, which
provides adequate current-loop stability without introduc
-
ing excessive phase shift at the crossover frequency. For
phase margin calculations, assume that two poles exist
at one-half of the switching frequency. Use of an abnor
-
mally high valued inductor will produce additional phase
shift due to slope compensation, thereby forcing a lower
voltage loop crossover frequency to ensure stability
. In
order to avoid having either too little or too much slope
compensation, make sure that the inductor satisfies the
following inequalities:
2V
OUT
R
SENSE
3S
R@K=2
< L <
3V
OUT
R
SENSE
S
R@K=1
for resistor sense mode and:
2V
OUT
R
SENSE
K
CT
N
S
3S
R@K
=
2
N
P
< L <
3V
OUT
R
SENSE
K
CT
N
S
S
R@K
=
1
N
P
for current transformer mode.
In some cases, the LTC3766 and LTC3765 will be in delay
phase-out mode at low input voltages. This cycle-by-cycle
reduction of the PG and FG turn-on delays has the effect
of reducing the amount of slope compensation by ap
-
proximately 20% to 40%. Consequently, a higher value
of inductance may be required to maintain current-loop
stability during operation in delay phase-out mode.
The compensation network is typically configured as shown
in
Figure 29. The objective of this network is to add DC
gain for excellent load regulation while providing good
phase margin in the voltage loop at the highest possible
crossover frequency. Normally this is achieved by adding
a dominant pole at very low frequency and a zero well be
-
fore the crossover frequency to remove most of the phase
Figure 29. ITH Compensation Network
0.6V
FB
ITH
R1
R3
R2
V
OUT
C1
3766 F29
C2
C3
(OPT)
g
m
= 2.7mS
LTC3766
+
–
EA