Datasheet

LTC3766
10
3766fa
For more information www.linear.com/LTC3766
block DiagraM
+
–
+
–
+
–
+
–
SWHI
PGND
WAIT
OVP
1.4V
SW
V
CC
FG
PGND
V
CC
SG
V
CC
V
CC
PT
+
PT
–
V
SEC
SWHI
C
V
SEC(TH)
V
SW
50V
30V
5.5mA LIMIT
4VSB
1.22V
V
IN(UV)
V
CC(UV)
V
CC
SD
PGND
PULSE
XFMR
ADAPTIVE
BLANKING
AND DELAY
DRIVER
ENCODING
AND
LOGIC
• •
MAIN
XFMR
• •
FGD
SGD
A
EN
275k
EN
12µA
1.21V
SW
3766 BD
V
IN
SENSE
V
OUT
SENSE
I
PEAK
ADJUST
HV LINREG DISABLE
1.22V
4VSB
LV: 4.7V/4.5V
HV: 8V/7.7V
LV: 4.7V/3.9V
HV: 7.9V/6.9V
A
LV: 58k
HV: 46k
5V TO 32V
DC
5V TO 15V
DC
V
IN
V
CC
V
AUX
REGSD
I
PK
NDRV
GND
V
REF
REGUVLO
SD
4VSB
WAIT
SSLO
OVERCURRENT
UVLO
V
IN
80k
+
–
AMP
DIFFERENTIAL AMPLIFIER
+
–
29.3x
2.2x
0.305V
–
+
+
+
+
I
S
+
2V
0.60V
g
m
= 2.7mS
ERROR
AMPLIFIER
SS
+
–
C
+
–
C
OC
2.93V
ITRP
PWM
RESET
DOMINANT
PEAK CURRENT
COMPARATOR
DMAX
OVERCURRENT
WAIT
OVP
SKIP
+
–
C
+
–
R
S
Q
R
S
Q
+
–
C
RIPPLE
CANCELLATION
+
I
S
–
FB
ITH
0.2V
1.9V
BLANK BLANK
DMAX
SWHI
+
–
EA
FS/SYNC
PHASE
PT
+
/PT
–
DRIVE TYPE
(PULSE ENCODED/STANDARD)
+
–
C
SLOPE
COMP
OSC
AND
PLL
SOFT-
START
BLANKING
DRIVE/V
CC
CONTROL
MODE
HV/LV MODE
SS
FB
V
SOUT
V
S
+
RUN
80k
80k
80k
V
S
–