Datasheet

LTC3766
41
3766fa
For more information www.linear.com/LTC3766
applicaTions inForMaTion
as the communication link between the secondary-side
controller and the primary-side gate driver, as shown in
Figure 28. In addition, LTC3765 contains a bridge recti
-
fier that extracts bias power from the pulse transformer,
which it then uses to drive the gates of the primary-side
MOSFETs.
The designs have been coordinated so that the transformer
turns ratio should be set to:
N
PT
= N
LTC3765
: N
LTC3766
= 2:1
for low voltage mode operation on the LTC3766 (V
CC
=
7V), and:
N
PT
= N
LTC3765
: N
LTC3766
= 1.5:1
for high voltage mode operation on the LTC3766 (V
CC
= 8.5V). The resulting V
CC
voltage on the LTC3765 is
approximately:
V
CC(3765)
= V
CC(3766)
N
PT
– 1.3
Using the above turns ratios will provide a primary-side
V
CC
voltage of approximately 12V for the LTC3765 to
drive the gates of the primary-side MOSFET. Note that the
primary-side V
CC
voltage provided by the pulse transformer
must also be greater than the LTC3765 UVLO threshold for
proper operation. Care must also be taken not to exceed
the maximum voltage rating on the LTC3765 V
CC
pin.
The pulse transformer must also have a minimum volt-
second rating as required by the 79% duty cycle signal
on PT
+
/PT
−
and the lowest frequency of operation. The
required volt-seconds rating can be calculated from the
minimum frequency as:
Volt-Sec = 0.33•
V
CC
f
SW(MIN)
Since the pulse transformer is used for transmitting
PWM information as well as bias power, choose a pulse
transformer with a leakage inductance of 1μH or less. This
reduces ringing and distortion of the PWM information
so that a solid communication link is always maintained.
For low voltage (7V) mode on the LTC3766, transformers
that meet the above requirements include the PA2008 from
Pulse Engineering and the DA2320 from Coilcraft. For high
voltage (8.5V) mode on the LTC3766, transformers that
meet the above requirements include the PA3290 from
Pulse Engineering.
The 1µF and 0.1µF capacitors in series with the pulse
transformer of Figure 28 are for blocking and restoring
the DC level of the signal. The 220pF/100Ω RC snubber
shown at the IN
+
/IN
–
inputs of the LTC3765 is required
to minimize ringing due to the leakage inductance of the
pulse transformer. The values shown for each of these
four components are appropriate in nearly all LTC3765/
LTC3766 applications.
Voltage Loop Compensation
The voltage loop of the LTC3766 is compensated in much
the same way as a standard buck converter, by placing a
compensation network on the ITH pin. It is important to
note, however, that the speed and stability of the voltage
loop is heavily dependent upon several factors apart from
the design of the ITH compensation. Common PCB layout
errors, for example, often appear as stability problems.
Examples include the distant placement of the input de
-
coupling capacitor, connecting the ITH compensation to a
ground track carr
ying significant switch current, and rout-
ing the FB signal over a long distance such that noise pick
occurs.
Refer
to the PCB Checklist section for additional
information. Another factor that affects the voltage loop
is the choice of output capacitor. If the value is too low, or
the ESR is too high, then it will not be possible to achieve
optimum loop performance. A third factor that can impair
loop response is the presence of underdamped resonances
in the power stage. Examples include an underdamped
LC input filter or an active clamp capacitor resonating
with the main transformer magnetizing inductance. Refer
to the Input Capacitor/Filter Selection and Active Clamp
Capacitor sections for details on how to properly damp
these LC resonances. Before attempting to optimize the
loop response, carefully consider the above factors,
IN
+
IN
–
100Ω
0.1µF
N
LTC3765
:N
LTC3766
220pF
3766 F28
LTC3765
PT
+
PT
–
LTC3766
1µF
••
Figure 28. Pulse Transformer Connection