Datasheet

LTC3766
26
3766fa
For more information www.linear.com/LTC3766
applicaTions inForMaTion
voltage on the V
CC
pin of the LTC3766. For the synchronous
MOSFET, the power loss is approximately:
P
SG
= 1–
N
P
N
S
V
OUT
V
IN
⎛
⎝
⎜
⎞
⎠
⎟
I
MAX
( )
2
1+ δ
( )
R
DS(ON)
+Q
GTOT
V
BIAS
f
SW
The power losses for the synchronous and forward MOSFET
are generally dominated by conduction losses. For both
of the above power loss equations, it is assumed that the
dead time (when the MOSFET body diode is conducting)
has been minimized. See Setting the Gate Drive Delays
section for details on minimizing the dead time.
V
CC
and Drive Mode Selection
In order to accommodate various operating gate voltages
that may be required by the secondary-side MOSFETs, the
MODE pin can be used to set the LTC3766 for either LV
mode or HV mode operation. In LV mode, the V
CC
regu-
lation point for both linear regulators is set to 7V, while
the V
CC
UVLO and V
AUX
switchover rising thresholds are
adjusted to 4.7V. In HV mode, the V
CC
regulation point is
set to 8.5V, while the V
CC
UVLO and the V
AUX
switchover
rising thresholds are set to 7.9V and 8V respectively. Use
LV mode for MOSFETs that are rated for 4V to 5V opera
-
tion, and use HV mode for those rated with 7V to 10V
operation. The V
CC
regulation levels, as well as the UVLO
and switchover voltages have been optimized to ensure
that both types of MOSFETs are operated safely and ef
-
ficiently. In general, MOSFETs with a higher V
DS
rating also
have a higher operating gate voltage rating. As a result,
applications with output voltages of approximately 12V
and higher will generally use MOSFETs that are rated for
7V to 10V gate operation.
In addition to changing the V
CC
regulation, UVLO and V
AUX
switchover levels, the selection of HV mode or LV mode
also changes the behavior of the SG reverse overcurrent.
In LV mode, the reverse overcurrent threshold on the
SW pin is 73mV and the adjust current is 103μA. In HV
mode, these levels are changed to 148mV and 42μA to
account for the fact that high voltage MOSFETs have larger
on-resistance than low voltage MOSFETs. For details, see
the Setting the SG Reverse Overcurrent.
In applications
where the LTC3766 is used in conjunction
with the LTC3765, the signals on the PT
+
and PT
–
pins
contain encoded PWM information with amplitude equal to
the V
CC
voltage. This encoded gate drive signal is received
by the LTC3765 and decoded into PWM and clock infor-
mation that drives the primary-side MOSFETs. However,
the L
TC3766 can also be used standalone in nonisolated
for
ward converter applications. In such applications, the
MODE pin can be used to disable the PWM encoding
on the PT
+
and PT
–
pins. As a result, the LTC3766 will
generate a normal PWM gate drive signal on the PT
+
pin
and a reference clock on the PT
–
pin. Also, in standalone
mode the FGD pin is ignored and the dead time between
SG falling and PT
+
rising is set adaptively.
The MODE pin has four possible states. Tying MODE to
GND or V
CC
will provide encoded gate drive signals with
either LV mode or HV mode operation respectively. Tying
MODE to GND through either a 100k or a 50k resistor will
provided standard PWM gate drive signals with either LV
mode or HV mode operation respectively. Table3 Sum
-
marizes the use of the MODE pin for setting the operat-
ing voltage and gate drive encoding modes, and Table 4
summarizes the effect of low voltage and high voltage
gate drive operating modes.
Table 3
MODE PIN DRIVE LEVEL PT
+
/PT
–
MODE INTENDED APPLICATIONS
GND LV Encoded PWM Low V
OUT
Isolated Apps
with LTC3765
V
CC
HV Encoded PWM High V
OUT
Isolated Apps
with LTC3765
100k to GND LV Standard PWM Low V
OUT
, Nonisolated
Apps, Standalone
50k to GND HV Standard PWM High V
OUT
, Nonisolated
Apps, Standalone
Table 4
DRIVE
LEVEL V
CC
V
CC
UVLO
THRESHOLD
(RISE/FALL)
V
AUX
SWITCHOVER
THRESHOLD
(RISE/FALL)
SG
OVERCURRENT
V
TH
I
SW
LV 7.0V 4.7V/3.9V 4.7V/4.5V 73mV 103μA
HV 8.5V 7.9V/6.9V 8.0V/7.7V 148mV 42μA