Datasheet
LTC3766
17
3766fa
For more information www.linear.com/LTC3766
operaTion
ated if the inputs on the differential amplifier are reversed,
or if there is not enough voltage on the V
IN
pin to support
the voltage needed on V
SOUT
. This is important to avoid
an overvoltage condition on the output. Finally, since it is
essential that the LTC3766 be in constant communication
with the LTC3765, a loss of communication lock will also
generate a fault. A lock condition is detected by monitoring
the SW node voltage, and ensuring that it is both rising
and falling as it should in response to the PWM signal
being sent to the primary side. If the SW node voltage
is not rising and falling in an appropriate manner, than a
lock fault is generated.
In addition to the four protection features that generate
faults, there are also four protection features that establish a
clamp or limit, without generating a fault. First, the LTC3766
contains a precision volt-second clamp. This feature is not
needed when the LTC3766 is used in conjunction with the
LTC3765, which incorporates the direct flux limit feature. If
the LTC3766 is used standalone, however, the volt-second
limit can be used by placing a resistor from the SW node to
the V
SEC
pin and a capacitor from V
SEC
to GND. When the
SW node is low, the capacitor is discharged by an on-chip
NMOS. When the SW node is high, the capacitor on V
SEC
is charged. If the capacitor voltage exceeds an internally
generated threshold, then the main primary switch will be
turned off, thereby limiting the volt-second product applied
to the main transformer. To compensate for the exponential
nature of the RC charging circuit, the LTC3766 adjusts the
threshold of the volt-second comparator according to:
V
SEC(TH)
= 0.6–
0.16
V
SW(HI)
where V
SW(HI)
is the voltage on the SW pin during the
on-time of the primary switch. This keeps the volt-second
limit essentially constant for SW node voltages in the
range of 2V to 40V.
Second, in the event that the main output voltage exceeds its
regulation target by more than 17%, the LTC3766 will detect
an overvoltage condition. If this happens, the LTC3766
will immediately turn off the main primary MOSFET and
turn on the synchronous MOSFET. This has the effect of
pulling down the output voltage to protect the load from
potential damage. Overvoltage protection is not latched,
and normal operation is restored when the output voltage
has been reduced to within 15% of its regulation level.
Third, the LTC3766 contains an adjustable synchronous
MOSFET reverse overcurrent. This is accomplished by
monitoring the SW voltage when the synchronous MOSFET
is on (SG pin is high). If the voltage on SW exceeds a
pre-determined threshold, then the synchronous MOSFET
will be turned off, protecting it from potentially damaging
current levels. This SW threshold for reverse overcurrent
detection can be reduced by placing a resistor in series
with the SW pin, which sources a current when the SG
pin is high. Note that the SG reverse overcurrent thresh
-
old and the SW pin source current are adjusted based on
the state
of the MODE pin. This is done to accommodate
the use of either high voltage or low voltage MOSFETs,
which normally have significantly different on resistances.
In an overvoltage condition, the SG reverse overcurrent
will override the overvoltage protection and force SG low,
essentially regulating the reverse SG MOSFET current
at a high level while the overvoltage condition persists.
However, the SG reverse overcurrent is only active after
the LTC3766 has achieved communication lock.
Finally, the REGSD pin can be used to limit the amount
of time that the high voltage linear regulator controller
is active. This is particularly useful when the LTC3766 is
used standalone in a nonisolated forward converter. In
this application, the pass device of the linear regulator
controller may be dissipating considerable power. When
the linear regulator controller is active, the REGSD pin
sources a 13μA current. If a capacitor from REGSD to
GND charges to a voltage greater than 1.21V, then linear
regulator controller is disabled.
Gate Driver Mode Control
In addition to being used in conjunction with the LTC3765,
the LTC3766 can also be used standalone in a nonisolated
forward converter application. In this case, the MODE pin
can be used to disable gate drive encoding by tying MODE
to GND through either a 100k (for V
CC
= 7V operation)
or 50k (for V
CC
= 8.5V operation) resistor. This causes
a normal PWM signal to appear on PT
+
and a reference
clock to appear on PT
–
.