Datasheet

LTC3736-2
17
37362fb
APPLICATIONS INFORMATION
current requirement. Increasing the output current drawn
from the other controller will actually decrease the input
RMS ripple current from its maximum value. The out-of-
phase technique typically reduces the input capacitor’s RMS
ripple current by a factor of 30% to 70% when compared
to a single-phase power supply solution.
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (V
OUT
)/(V
IN
). To
prevent large voltage transients, a low ESR capacitor sized
for the maximum RMS current of one channel must be
used. The maximum RMS capacitor current is given by:
C
I
V
VVV
IN
MAX
IN
OUT IN OUT
Required I
RMS
≈
()( )
[]
–
/12
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
= I
OUT
/2. This simple worst-case condition is commonly
used for design because even signifi cant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3736-2, ceramic capacitors
can also be used for C
IN
. Always consult the manufacturer
if there is any question.
The benefi t of the LTC3736-2 2-phase operation can be
calculated by using the equation above for the higher
power controller and then calculating the loss that would
have resulted if both controller channels switched on at
the same time. The total RMS power lost is lower when
both controllers are operating due to the reduced overlap of
current pulses required through the input capacitor’s ESR.
This is why the input capacitor’s requirement calculated
above for the worst-case controller is adequate for the dual
controller design. Also, the input protection fuse resistance,
battery resistance, and PC board trace resistance losses
are also reduced due to the reduced peak currents in a
2-phase system. The overall benefi t of a multiphase design
will only be fully realized when the source impedance of the
power supply/battery is included in the effi ciency testing.
The sources of the P-channel MOSFETs should be placed
within 1cm of each other and share a common C
IN
(s).
Separating the sources and C
IN
may produce undesirable
voltage and current resonances at V
IN
.
A small (0.1μF to 1μF) bypass capacitor between the chip
V
IN
pin and ground, placed close to the LTC3736-2, is
also suggested. A 10Ω resistor placed between C
IN
(C1)
and the V
IN
pin provides further isolation between the
two channels.
The selection of C
OUT
is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfi ed, the capacitance is adequate for fi ltering. The
output ripple (ΔV
OUT
) is approximated by:
Δ≈ +
⎛
⎝
⎜
⎞
⎠
⎟
V I ESR
fC
OUT RIPPLE
OUT
1
8
where f is the operating frequency, C
OUT
is the output
capacitance and I
RIPPLE
is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I
RIPPLE
increases with input voltage.
Setting Output Voltage
The LTC3736-2 output voltages are each set by an exter-
nal feedback resistor divider carefully placed across the
output, as shown in Figure 5. The regulated output voltage
is determined by:
VV
R
R
OUT
B
A
=+
⎛
⎝
⎜
⎞
⎠
⎟
06 1.•
To improve the frequency response, a feedforward ca-
pacitor, C
FF
, may be used. Great care should be taken to
route the V
FB
line away from noise sources, such as the
inductor or the SW line.