Datasheet

LTC3736-2
14
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The typical LTC3736-2 application circuit is shown in
Figure 13. External component selection for each of the
LTC3736-2’s controllers is driven by the load requirement
and begins with the selection of the inductor (L) and the
power MOSFETs (MP and MN).
Power MOSFET Selection
Each of the LTC3736-2’s two controllers requires two
external power MOSFETs: a P-channel MOSFET for the
topside (main) switch and an N-channel MOSFET for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V
BR(DSS)
,
threshold voltage V
GS(TH)
, on-resistance R
DS(ON)
, reverse
transfer capacitance C
RSS
, turn-off delay t
D(OFF)
and the
total gate charge Q
G
.
The gate drive voltage is the input supply voltage. Since
the LTC3736-2 is designed for operation down to low input
voltages, a sublogic level MOSFET (R
DS(ON)
guaranteed at
V
GS
= 2.5V) is required for applications that work close to
this voltage. When these MOSFETs are used, make sure that
the input supply to the LTC3736-2 is less than the absolute
maximum MOSFET V
GS
rating, which is typically 8V.
The P-channel MOSFET’s on-resistance is chosen based on
the required load current. The maximum average output
load current I
OUT(MAX)
is equal to the peak inductor cur-
rent minus half the peak-to-peak ripple current I
RIPPLE
.
The LTC3736-2’s current comparator monitors the drain-
to-source voltage V
DS
of the P-channel MOSFET, which
is sensed between the SENSE
+
and SW pins. The peak
inductor current is limited by the current threshold, set by
the voltage on the I
TH
pin of the current comparator. The
voltage on the I
TH
pin is internally clamped, which limits
the maximum current sense threshold ΔV
SENSE(MAX)
to
approximately 240mV when IPRG is fl oating (167mV when
IPRG is tied low; 345mV when IPRG is tied high).
The output current that the LTC3736-2 can provide is
given by:
I
V
R
I
OUT MAX
SENSE MAX
DS ON
RIPPL
E
()
()
()
–=
Δ
2
APPLICATIONS INFORMATION
A reasonable starting point is setting ripple current I
RIPPLE
to be 40% of I
OUT(MAX)
. Rearranging the above equation
yields:
R
V
I
DS ON MAX
SENSE MAX
OUT MAX
()( )
()
()
•=
Δ
5
6
or Duty Cycle < 20%.
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
the appropriate value of R
DS(ON)
to provide the required
amount of load current:
RSF
V
I
DS ON MAX
SENSE MAX
OUT MAX
()( )
()
()
••=
Δ
5
6
where SF is a scale factor whose value is obtained from
the curve in Figure 1.
These must be further derated to take into account the
signifi cant variation in on-resistance with temperature.
The following equation is a good guide for determin-ing
the required R
DS(ON)MAX
at 25°C (manufacturer’s specifi ca-
tion), allowing some margin for variations in the LTC3736-2
and external component values:
RSF
V
I
DS ON MAX
SENSE MAX
OUT MAX
()( )
()
(
•.• •=
Δ
5
6
09
))
• ρ
T
The ρ
T
is a normalizing term accounting for the tem-
perature variation in on-resistance, which is typically
about 0.4%/ °C, as shown in Figure 4. Junction-to-case
temperature T
JC
is about 10°C in most applications. For
a maximum ambient temperature of 70°C, using
ρ
80°C
~
1.3 in the above equation is a reasonable choice.
The power dissipated in the top and bottom MOSFETs
strongly depends on their respective duty cycles and load
current. When the LTC3736-2 is operating in continuous
mode, the duty cycles for the MOSFETs are:
Top P Channel Duty Cycle
V
V
Bottom N C
OUT
IN
-
-
=
hhannel Duty Cycle
VV
V
IN OUT
IN
=
–