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LTC3735

3735fa

TYPICAL APPLICATION

FEATURES DESCRIPTION

2-Phase, High Efficiency

DC/DC Controller for

Intel Mobile CPUs

The LTC

3735 is a 2-phase synchronous step-down

switching regulator controller that drives all N-channel

power MOSFETs in a constant frequency architecture. The

output voltage is programmable by six VID bits during

normal operation and by external resistors during initial

boot-up and deeper sleep state. The LTC3735 drives its two

output stages out-of-phase at frequencies up to 550kHz

to minimize the RMS ripple currents in both input and

output capacitors. This antiphase technique also doubles

the apparent switching frequency, improving the transient

response while operating each phase at an optimum fre-

quency for efficiency. Thermal design is further simplified

by cycle-by-cycle current sharing between the two phases.

An Intel compatible PSIB input is provided to select between

two modes of operation. Fully enhanced synchronous

mode achieves a very small output ripple and very fast

transient response while power saving mode realizes

very high efficiency. OPTI-LOOP

compensation allows

the transient response to be optimized for a wide range

of output capacitance and ESR values.

Figure 1. High Current 2-Phase Step-Down Converter

APPLICATIONS

Output Stages Operate Antiphase

±1% Output Voltage Accuracy

6-Bit IMVP-IV VID Code: V

OUT

= 0.7V to 1.708V

Intel Compatible Power Saving Mode (PSIB)

Stage Shedding Improves Low Current Efficiency

Power Good Output with Adaptive Masking

Lossless Voltage Positioning

Dual Input Supply Capability for Load Sharing

Resistor Programmable V

OUT

at Boot-Up and Deeper

Sleep State

Resistor Programmable Deep Sleep Offset

Programmable Fixed Frequency: 210kHz to 550kHz

Adjustable Soft-Start Current Ramping

Foldback Output Current Limit

Short-Circuit Shutdown Timer with Defeat Option

Overvoltage Protection

Available in 36-Lead SSOP (0.209 Wide) and 38-Lead

(5mm × 7mm) Packages

Mobile and Desktop Computers

Internet Servers

L, LT, LTC, LTM, OPTI-LOOP, PolyPhase, Linear Technology and the Linear logo are registered

trademarks of Linear Technology Corporation. All other trademarks are the property of their

respective owners.

1µH

0.002Ω

1µH

13.3k

12.7k

0.002Ω

OUT

330µF

×5

OUT

0.7V TO 1.708V

40A

5V TO 24V

1.27M

549k

3735 F01

56.2k

13.3k

TG1MCH_PG

DPRSLPVR

STP_CPUB

PSIB

FREQSET

VID5-VID0

PGOOD

SGND

LTC3735

RUN/SS

470pF

100pF

0.1µF

0.47µF0.47µF

4.5V TO 7V

4.74k

SW1

BG1

PGND

TG2

SW2

BG2

SENSE1

–

SENSE2

–

RBOOT

RDPRSLP

RDPSLP

OAOUT

–

10µF

35V

×4

BAT54A

SW2 SW1

BOOST1

BOOST2

4.7µF

232k

Summary of content (32 pages)

PAGE 1
LTC3735 2-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs DESCRIPTION FEATURES n n n n n n n n n n n n n n n n Output Stages Operate Antiphase ±1% Output Voltage Accuracy 6-Bit IMVP-IV VID Code: VOUT = 0.7V to 1.
PAGE 2
LTC3735 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (PVCC)........................ 7V to – 0.3V Topside Driver Voltages (BOOST1,2).......... 38V to –0.3V Switch Voltage (SW1, 2)................................ 32V to –5V Boosted Driver Voltages (BOOST1-SW1, BOOST2-SW2)................ 7V to –0.3V DPRSLPVR, STP_CPUB, MCH_PG, PGOOD, RDPRSLP, RDPSLP, RBOOT Voltages .......... 5V to –0.3V RUN/SS, PSIB, FREQSET Voltages ..............7V to – 0.3V VID0-VID5 Voltages ....................................
PAGE 3
LTC3735 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VPVCC = 5V, VRUN/SS = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loop Reference Regulated Feedback Voltage ITH Voltage = 0.5V; Measured at VFB (Note 4) VSENSEMAX Maximum Current Sense Threshold ITH Voltage = Max; VCM = 1.
PAGE 4
LTC3735 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VPVCC = 5V, VRUN/SS = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS IFREQSET FREQSET Input Current VFREQSET = 0V MIN TYP MAX UNITS –2 –1 µA Oscillator fNOM Nominal Frequency VFREQSET = 1.2V 320 355 390 kHz fLOW Lowest Frequency VFREQSET = 0V 190 210 240 kHz fHIGH Highest Frequency VFREQSET ≥ 2.
PAGE 5
LTC3735 TYPICAL PERFORMANCE CHARACTERISTICS Active Mode Efficiency (Figure 14) 100 90 VID = 1.468V PSI = 0 Efficiency vs Input Voltage (Figure 14) 100 PSI = 0 VIN = 7.5V 80 VIN = 7.5V 80 EFFICIENCY (%) VIN = 20V VIN = 20V 70 70 60 0 5 10 15 20 LOAD CURRENT (A) 25 60 0.
PAGE 6
LTC3735 TYPICAL PERFORMANCE CHARACTERISTICS Load Regulation (Without AVP) SENSE Pins Total Source Current 100 VPSIB = 5V VIN = 15V FIGURE 1 50 –0.1 ISENSE (µA) NORMALIZED VOUT (%) 0.0 –0.2 –50 –0.3 –0.4 0 0 5 15 10 LOAD CURRENT (A) 20 –100 25 2 0 4 6 VSENSE COMMON MODE VOLTAGE (V) 3735 G12 3735 G10 Maximum Current Sense Threshold vs Temperature Current Sense Pin Input Current vs Temperature RUN/SS Current vs Temperature 78 –12 CURRENT SENSE INPUT CURRENT (µA) 1.8 1.
PAGE 7
LTC3735 TYPICAL PERFORMANCE CHARACTERISTICS VRUN/SS Shutdown Latch Thresholds vs Temperature Load Step (Figure 14) VID Transition (Figure 14) SHUTDOWN LATCH THRESHOLDS (V) 4.5 VIDs LATCH ARMING 4.0 3.0 IOUT 10A/DIV LATCHOFF THRESHOLD 2.5 0 1.356V 32A 3.5 VOUT 200mV /DIV 7.2A 0.844V 1.364V VOUT 100mV/DIV 1.230V 2.0 1.5 1 PGOOD 2V/DIV 1.0 0.
PAGE 8
LTC3735 PIN FUNCTIONS (G/UHF) RUN/SS (Pin 16/Pin 15): Combination of Soft-Start, Run Control Input and Short-Circuit Detection Timer. A capacitor to ground at this pin sets the ramp time to full current output. Forcing this pin below 1V causes the IC to shut down all internal circuitry. All functions are disabled in shutdown. ITH (Pin 17/Pin 16): Error Amplifier Output and Switching Regulator Compensation Point. Both current comparator’s thresholds increase with this control voltage.
PAGE 9
LTC3735 FUNCTIONAL DIAGRAM R3 R4 MCH_PG R6 RDPSLP STP_CPUB R5 DPRSLPVR RDPRSLP MD DELAY FREQSET CLK1 OSCILLATOR CLK2 TO SECOND CHANNEL DUPLICATE FOR SECOND CONTROLLER CHANNEL BOOST DROP OUT DET – 0.66V + RUN VFB – + VOA+ S Q R Q BOT DB CB + D1 PSI TOP ON SWITCH LOGIC PVCC BOT 0.54V BG COUT + DPRSLPVR A1 SHDN I1 OAOUT – + – ++ – – 0.5µA PVCC I2 + 36k SENSE + – 36k SENSE SLOPE COMP PSIB + – 54k 54k VFB 2.4V PSI – EA + VREF 0.60V VOUT RSENSE L 5.
PAGE 10
LTC3735 OPERATION (Refer to Functional Diagram) Main Control Loop The LTC3735 uses a constant frequency, current mode stepdown architecture with the two output stages operating 180 degrees out of phase. During normal operation, each top MOSFET is turned on when the clock for that channel sets the RS latch, and turned off when the main current comparator, I1, resets the RS latch.
PAGE 11
LTC3735 OPERATION (Refer to Functional Diagram) Output Voltage at Start-Up and at Deeper Sleep State Power Good Under normal conditions, the output voltage of the regulator is commanded by six VID bits, except at start-up and at deeper sleep state. At start-up, the RUN/SS capacitor starts to charge up and its voltage limits the inrush current from the input power source. This linearly rising current limit provides a controlled output voltage rise.
PAGE 12
LTC3735 APPLICATIONS INFORMATION biased with a resistor divider to prevent noise getting into the system. A graph for the voltage applied to the FREQSET pin vs frequency is given in Figure 2. As the operating frequency is increased the gate drive and switching losses will be higher, reducing efficiency (see Efficiency Considerations). The maximum switching frequency is approximately 550kHz.
PAGE 13
LTC3735 APPLICATIONS INFORMATION In a 2-phase converter, the net ripple current seen by the output capacitor is much smaller than the individual inductor ripple currents due to ripple cancellation. The details on how to calculate the net output ripple current can be found in Linear Technology Application Note 77. Figure 3 shows the net ripple current seen by the output capacitors for 1- and 2-phase configurations.
PAGE 14
LTC3735 APPLICATIONS INFORMATION The conduction losses of the top and bottom MOSFETs are therefore: PCONTOP = VOUT VIN 2 I  •  OUT  • (1+ δ • ∆T ) •RDS(ON)(3)  2  V –V PCONBOT = IN OUT VIN 2 I  •  OUT  • (1+ δ • ∆T )  2  (4) • RDS(ON) where IOUT is the total output current at full load, ∆T is the difference between MOSFET operating temperature and room temperature, and δ is the temperature dependency of RDS(ON). δ is roughly 0.004/°C ~ 0.006/°C for low voltage MOSFETs.
PAGE 15
LTC3735 APPLICATIONS INFORMATION CIN and COUT Selection In continuous mode, the source current of each top N‑channel MOSFET is a square wave of duty cycle VOUT/ VIN. A low ESR input capacitor sized for the maximum RMS current must be used. The details of a closed form equation can be found in Linear Technology Application Note 77. Figure 4 shows the input capacitor ripple current for a 2-phase configuration with the output voltage fixed and input voltage varied.
PAGE 16
LTC3735 APPLICATIONS INFORMATION Linear Technology Application Note 77. Assuming inductors are selected to have same ripple percentage for both 1-phase and 2-phase configurations, Figure 5 shows the reduction of output ripple current by 2-phase operation. Not only the ripple amplitude is more than halved, but the ripple frequency is also doubled.
PAGE 17
LTC3735 APPLICATIONS INFORMATION Topside MOSFET Driver Supply (CB,DB) (Refer to Functional Diagram) External bootstrap capacitors CB1 and CB2 connected to the BOOST1 and BOOST2 pins supply the gate drive voltages for the topside MOSFETs. Capacitor CB in the Functional Diagram is charged though diode DB from PVCC when the SW pin is low. When the topside MOSFET turns on, the driver places the CB voltage across the gate-source of the desired MOSFET. This enhances the MOSFET and turns on the topside switch.
PAGE 18
LTC3735 APPLICATIONS INFORMATION Table 2. VID Output Voltage Programming VID5 VID4 VID3 VID2 VID1 VID0 LTC3735 VID5 VID4 VID3 VID2 VID1 VID0 LTC3735 0 0 0 0 0 0 1.708V 1 0 0 0 0 0 1.196V 0 0 0 0 0 1 1.692V 1 0 0 0 0 1 1.180V 0 0 0 0 1 0 1.676V 1 0 0 0 1 0 1.164V 0 0 0 0 1 1 1.660V 1 0 0 0 1 1 1.148V 0 0 0 1 0 0 1.644V 1 0 0 1 0 0 1.132V 0 0 0 1 0 1 1.628V 1 0 0 1 0 1 1.116V 0 0 0 1 1 0 1.
PAGE 19
LTC3735 APPLICATIONS INFORMATION After the output voltage enters the ±10% regulation window centered at VBOOT, the internal power good comparator issues a logic high signal. Refer to the timing diagram in Figure 7. This signal then enters a logic AND gate, with MCH_PG being the other input, and the output of the gate is PG shown in Figure 7. This composite PG signal is then delayed by tBOOT amount of time and then becomes MD.
PAGE 20
LTC3735 APPLICATIONS INFORMATION The masking circuitry also adaptively tracks VID and state changes. If a new change in VID or state happens before the 110µs masking timer expires, the timer resets and starts a fresh count of 110µs. This prevents the system from rebooting under frequent output voltage transitions. Refer to Figure 8 for the PGOOD timing diagram. During start-up, PGOOD is actively pulled low until the RUN/ SS pin voltage reaches its arming voltage, which is 4.
PAGE 21
LTC3735 APPLICATIONS INFORMATION Minimum On-Time Considerations Minimum on-time, tON(MIN), is the smallest time duration that the LTC3735 is capable of turning on the top MOSFET. It is determined by internal timing delays and the gate charge required to turn on the top MOSFET.
PAGE 22
LTC3735 APPLICATIONS INFORMATION Rewriting this equation, we can estimate the RAVP value to be: R AVP≅ 35.5 •R3 m •| AVP| –1 RSENSE (12) Typically the calculation results based on these equations have ±10% tolerance. So the resistor values need to be fine tuned. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%.
PAGE 23
LTC3735 APPLICATIONS INFORMATION load current. When a load step occurs, VOUT shifts by an amount equal to ∆ILOAD(ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT generating the feedback error signal that forces the regulator to adapt to the current change and return VOUT to its steady-state value. During this recovery time VOUT can be monitored for excessive overshoot or ringing, which would indicate a stability problem.
PAGE 24
LTC3735 APPLICATIONS INFORMATION Design Example 2 As a design example, assume VIN = 12V (nominal), VIN = 21V (max), VOUT = 1.5V, IMAX = 35A, and f = 350kHz (each phase). 1.5V  35A  PTOP = • • 1+ 0.005 • ( 85°C – 25°C) • 21V  2  0.008Ω + The inductance value is chosen first based on a 40% ripple current assumption. The highest value of ripple current occurs at the maximum input voltage. The minimum inductance for 40% ripple current is: L≥ VOUT  VOUT  1.
PAGE 25
LTC3735 APPLICATIONS INFORMATION Using Figure 4, the RMS input ripple current will be: IINRMS = 35A • 0.22 = 7.7A An input capacitor(s) with a 8A RMS current rating is required. The output capacitor ripple current is calculated by using the inductor ripple current and multiplying by the factor obtained from Figure 3. The output ripple will be highest at the maximum input voltage since the duty cycle is less than 50%. The maximum output current ripple is: ∆IOUT(MAX) = 1.5V • 0.77 = 5.5AP-P 350kHz • 0.
PAGE 26
LTC3735 APPLICATIONS INFORMATION SW1 L1 RSENSE1 D1 VIN VOUT RIN CIN + + SW2 BOLD LINES INDICATE HIGH, SWITCHING CURRENT LINES. KEEP LINES TO A MINIMUM LENGTH. L2 COUT RL RSENSE2 D2 3735 F12 Figure 12. Instantaneous Current Path Flow in a Multiple Phase Switching Regulator The ground terminations of the sychronous MOSFETs and Schottky diodes should return to the negative plate(s) of the input capacitor(s) with a short isolated PC trace since very high switched currents are present.
PAGE 27
LTC3735 APPLICATIONS INFORMATION SINGLE PHASE SW V ICIN Figure 4 illustrates the RMS input current drawn from the input capacitance vs the duty cycle as determined by the ratio of input and output voltage. The peak input RMS current level of the single phase system is reduced by 50% in a 2-phase solution due to the current splitting between the two stages.
PAGE 28
LTC3735 TYPICAL APPLICATION Figure 14 shows a typical application using the LTC3735 to power the mobile CPU core. The input can vary from 5V to 24V; the output voltage can be programmed from 0.7V to 1.708V with a maximum current of 32A. By only modifying the external MOSFET and inductor selection, higher load current capability (up to 40A) can be achieved. 1.708V. When the STP_CPUB signal is low, a deep sleep state is indicated and the output voltage is decreased by about 1.04%.
PAGE 29
LTC3735 PACKAGE DESCRIPTION G Package 36-Lead Plastic SSOP (5.3mm) (Reference LTC DWG # 05-08-1640) 12.50 – 13.10* (.492 – .516) 1.25 ±0.12 7.8 – 8.2 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 5.3 – 5.7 0.42 ±0.03 7.40 – 8.20 (.291 – .323) 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 RECOMMENDED SOLDER PAD LAYOUT 2.0 (.079) MAX 5.00 – 5.60** (.197 – .221) 0° – 8° 0.09 – 0.25 (.0035 – .010) 0.55 – 0.95 (.022 – .037) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2.
PAGE 30
LTC3735 PACKAGE DESCRIPTION UHF Package 38-Lead Plastic QFN (5mm × 7mm) (Reference LTC DWG # 05-08-1701 Rev C) 0.70 ± 0.05 5.50 ± 0.05 5.15 ± 0.05 4.10 ± 0.05 3.00 REF 3.15 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 5.5 REF 6.10 ± 0.05 7.50 ± 0.05 RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ± 0.10 0.75 ± 0.05 PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 3.00 REF 37 0.00 – 0.05 38 0.40 ±0.10 PIN 1 TOP MARK (SEE NOTE 6) 1 2 5.15 ± 0.10 5.50 REF 7.
PAGE 31
LTC3735 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 4/11 Updated Figure 14 28 Updated Related Parts 32 3735fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PAGE 32
LTC3735 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3816 Single Phase DC/DC Controller for Intel IMVP-6/6+/6.5 CPUs 7-Bit IMVP-6 VID: 0.00V ≤ VOUT ≤ 1.50V, 4.5V ≤ VIN ≤ 36V, Very Low Duty Cycle Capable LTC3732 3-Phase, 5-Bit VID, 600kHz, Synchronous Controller 5-Bit VRM 9/9.1: 1.10V ≤ VOUT ≤ 1.85V LTC3734 Single Phase DC/DC Controller for IMVP-4 6-Bit IMVP-4 VID: 0.70V ≤ VOUT ≤ 1.708V, 4.