Datasheet

LTC3734
23
3734fa
APPLICATIONS INFORMATION
The power loss dissipated by the top MOSFET can be cal-
culated with equations 3 and 7. Using a Fairchild FDS7760
as an example: R
DS(ON)
= 8mΩ, Q
G
= 55nC at 5V V
GS
, C
RSS
= 307pF, V
TH(MIN)
= 1V. At maximum input voltage with
T
J
(estimated) = 85°C at an elevated ambient temperature:
P
TOP
=
1.5V
21V
• 20A
2
• 1+ 0.005 • 85°C – 25°C
( )
( )
•
0.008Ω + 21V
2
•
20A
2
• 350kHz • 307pF •
2Ω •
1
5V – 1V
+
1
1V






= 1.48W
Equation 4 gives the worst-case power loss dissipated
by the bottom MOSFET (assuming FDS7760 and T
J
=
85°C again):
P
BOT
=
21V – 1.5V
21V
• 20A
2
•
1+0.005• 85°C– 25°C
( )
( )
• 0.008Ω
=
3.86W
Therefore, it is necessary to have two FDS7760s in par-
allel to split the power loss for both the top and bottom
MOSFETS.
A short-circuit to ground will result in a folded back cur-
rent of about:
I
SC
=
25mV
0.002Ω
+
1
2
•
200ns •21V
0.5µH






= 16.7A
The worst-case power dissipation by the bottom MOSFET
under short-circuit conditions is:
P
BOT
=
1
350kHz
– 200ns
1
350kHz
•16.7A
2
•
1+0.005• 85°C– 25°C
( )
( )
• 0.008Ω
=
2.7W
which is less than normal, full load conditions.
The RMS input ripple current will be:
I
INRMS
= 20A/2 = 10A
An input capacitor(s) with a 10A RMS current rating is
required.
The output capacitor ripple current is calculated. The out-
put ripple will be highest at the maximum input voltage:
∆I
OUT(MAX)
=
1.5V
350kHz •0.5µH
• 1−
1.5
2.1






= 8A
P-P
Assuming the ESR of output capacitor(s) is 5mΩ, the
output ripple voltage is:
∆V
OUT
≈ 8A
P-P
5mΩ +
1
8 •350kHz • 4 • 270µF
( )






= 42.6mV
P-P