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LTC3734

3734fa

TYPICAL APPLICATION

FEATURES DESCRIPTION

Single-Phase,

High Efficiency DC/DC

Controller for Intel Mobile CPUs

The LTC

3734 is a single-phase synchronous step-down

switching regulator controller that drives all N-channel

power MOSFETs in a constant frequency architecture. The

output voltage is programmable by six VID bits during

normal operation and by external resistors during initial

boot-up and deeper sleep state. The LTC3734 drives its

output stage at frequencies up to 550kHz. Powerful on-

chip gate drivers eliminate the need for external gate driver

ICs, thus simplifying the design.

An Intel compatible PSIB input is provided to select between

two modes of operation. Fully enhanced synchronous

mode achieves a very small output ripple and very fast

transient response while power saving mode realizes

very high efficiency. OPTI-LOOP

compensation allows

the transient response to be optimized for a wide range

of output capacitance and ESR values.

The LTC3734 is available in a small 5mm × 5mm QFN

package. For 2-phase applications refer to the LTC3735.

APPLICATIONS

Wide Input Voltage Range: 4V to 30V

■

±1% Output Voltage Accuracy

■

6-Bit IMVP-IV VID Code: V

OUT

= 0.7V to 1.708V

■

Intel Compatible Power Saving Mode (PSIB)

■

Power Good Output with Adaptive Masking

■

Lossless Voltage Positioning

■

Resistor Programmable V

OUT

at Boot-Up and

Deeper Sleep State

■

Resistor Programmable Deep Sleep Offset

■

Programmable Fixed Frequency: 210kHz to 550kHz

■

Adjustable Soft-Start Current Ramping

■

Foldback Output Current Limit

■

Short-Circuit Shutdown Timer with Defeat Option

■

Overvoltage Protection

■

Available in 32-Lead 5mm × 5mm × 0.8mm (Proﬁle)

QFN Package

Mobile and Desktop Computers

■

Internet Servers

L, LT, LTC, LTM, OPTI-LOOP, Burst Mode, Linear Technology and the Linear logo are registered

trademarks and Stage Shedding is a trademark of Linear Technology Corporation. All other

trademarks are the property of their respective owners.

0.8µH

M2 D1

0.002Ω

12.7k

OUT

270µF

×3

OUT

0.7V TO 1.708V

20A

5V TO 24V

13.3k

1.27M

3734 F01

56.2k

13.3k

TGMCH_PG

DPRSLPVR

STP_CPUB

PSIB

FREQSET

VID5-VID0

PGOOD

SGND

RUN/SS

680pF

100pF

0.1µF

0.47µF

4.5V TO 7V

PGND

SENSE

–

RBOOT

RDPRSLP

RDPSLP

OAOUT

–

10µF

35V

×4

BAT54A

BOOST SV

4.7µF

0.1µF

4.5V TO 7V

6-BIT VID

LTC3734

Figure 1. High Current Step-Down Converter

Summary of content (28 pages)

PAGE 1
LTC3734 Single-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs FEATURES n ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Wide Input Voltage Range: 4V to 30V ±1% Output Voltage Accuracy 6-Bit IMVP-IV VID Code: VOUT = 0.7V to 1.
PAGE 2
LTC3734 BOOST PGOOD MCH_PG VFB SVCC DPRSLPVR PSIB Input Supply Voltage (PVCC, SVCC).............. 7V to – 0.3V Topside Driver Voltages (BOOST)............... 38V to –0.3V Switch Voltage (SW)...................................... 32V to –5V Boosted Driver Voltages (BOOST-SW).......... 7V to –0.3V DPRSLPVR, STP_CPUB, MCH_PG, PGOOD, RDPRSLP, RDPSLP, RBOOT Voltages .......... 5V to –0.3V RUN/SS, FREQSET, PSIB Voltages ...............7V to – 0.3V VID0-VID5 Voltages .....................................
PAGE 3
LTC3734 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VPVCC = VSVCC = 5V, VRUN/SS = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS IQ Input DC Supply Current Normal Mode Shutdown (Note 5) MIN VRUN/SS = 0V TYP MAX UNITS 2 20 3 100 mA µA UVR Undervoltage RUN/SS Reset VCC Lowered Until the RUN/SS Pin is Pulled Low 3.2 3.7 4.
PAGE 4
LTC3734 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VPVCC = VSVCC = 5V, VRUN/SS = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 15 200 nA 0.8 5 mV Operational Amp IB Input Bias Current VOS Input Offset Voltage Magnitude VOA+ = VOA– 1.
PAGE 5
LTC3734 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs SVCC Voltage and Mode 2500 75 80 70 ON 2000 60 1500 1000 50 VSENSE (mV) VSENSE (mV) SUPPLY CURRENT (µA) Maximum Current Sense Threshold vs Percent of Nominal Output Voltage (Foldback) Maximum Current Sense Threshold vs Duty Factor 25 0 7 6 5 SVCC VOLTAGE (V) 4 0 20 40 60 DUTY FACTOR (%) 80 0 100 80 50 100 0 25 75 PERCENT OF NOMINAL OUTPUT VOLTAGE (%) 3734 G06 3734 G05 Maximum Current Sense Threshold vs VRUN/SS (Soft-St
PAGE 6
LTC3734 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Current Sense Threshold vs Temperature RUN/SS Current vs Temperature 78 Load Step (Figure 9) 1.8 1.6 RUN/SS CURRENT (µA) VSENSE (mV) 76 74 72 70 1.4 VOUT 100mV/DIV 1.2 1.2V 1.116V 1.0 0.8 12A 0.6 IOUT 4A/DIV 0.4 2.5A 0.2 –25 50 25 0 75 TEMPERATURE (°C) 100 0 –50 125 –25 0 25 50 75 TEMPERATURE (°C) 3734 G13 600 –11 –10 –9 –8 4.5 100 125 3734 G16 VFREQSET = 2.4V 500 400 VFREQSET = 1.
PAGE 7
LTC3734 PIN FUNCTIONS VOA+, VOA– (Pins 1, 2): Inputs to the Internal Operational Amplifier. OAOUT (Pin 3): Output of the Internal Operational Amplifier. STP_CPUB (Pin 4): Deep Sleep State Input. When the signal to this pin is low, the voltage regulator enters deep sleep state and its output voltage is a certain percentage lower than the VID commands. This offset percentage is set by the resistor connected to the RDPSLP pin. When the signal to this pin is high, the voltage regulator exits deep sleep state.
PAGE 8
LTC3734 PIN FUNCTIONS SW (Pin 23): Switch Node Connection to Inductor. Voltage swing at this pin is from a Schottky diode (external) voltage drop below ground to VIN. TG (Pin 24): High Current Gate Drive for Top N-Channel MOSFETs. This is the output of a floating driver with a voltage swing equal to PVCC superimposed on the switch node voltage SW. BOOST (Pin 25): Bootstrapped Supply to the Topside Floating Driver.
PAGE 9
LTC3734 FUNCTIONAL DIAGRAM R3 R4 MCH_PG FREQSET R6 RDPSLP STP_CPUB R5 DPRSLPVR RDPRSLP MD DELAY CLK OSCILLATOR RBOOT COMPOSITE PG PVCC BOOST STP_CPUB DPRSLPVR VID CHANGE PGOOD – 110µs BLANKING DROP OUT DET 0.66V + RUN S VFB – + BOT Q PVCC BG BOT COUT A1 PVCC SHDN I1 OAOUT – + – ++ – – 0.5µA + 36k SENSE + – 36k SENSE SLOPE COMP PSIB L SVCC I2 54k 54k VFB 2.4V + VOUT RSENSE PVCC 5.33(VFB) 3V PSI – – EA + VREF 0.
PAGE 10
LTC3734 OPERATION (Refer to Functional Diagram) Main Control Loop Low Current Operation (PSIB) The LTC3734 uses a constant frequency, current mode step-down architecture. During normal operation, the top MOSFET is turned on when the clock sets the RS latch, and turned off when the main current comparator, I1, resets the RS latch. The peak inductor current at which I1 resets the RS latch is controlled by the voltage on the ITH pin, which is the output of error amplifier EA.
PAGE 11
LTC3734 OPERATION (Refer to Functional Diagram) Operational Amplifier and Deep Sleep Offset The internal operational amplifier provides a programmable output offset at deep sleep state (when the STP_CPUB signal is low). The offset percentage is programmed by the resistor from RDPSLP to VOA+ and the resistor from output to VOA+. The amplifier has an output slew rate of 5V/µs and is capable of driving capacitive loads with an output RMS current typically up to 40mA.
PAGE 12
LTC3734 APPLICATIONS INFORMATION 600 550 OPERATING FREQUENCY (kHz) The basic LTC3734 application circuit is shown in Figure 1 on the first page of this data sheet. External component selection begins with the selection of the inductors based on ripple current requirements and continues with the current sensing resistors using the calculated peak inductor current and/or maximum current limit. Next, the power MOSFET, D1 is selected.
PAGE 13
LTC3734 APPLICATIONS INFORMATION Inductor Core Selection Once the value for L1 is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy, or Kool Mµ cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductor type selected. As inductance increases, core losses go down.
PAGE 14
LTC3734 APPLICATIONS INFORMATION MOSFET threshold voltage, the nonlinearity of current rising/falling characteristic and the Miller Effect.
PAGE 15
LTC3734 APPLICATIONS INFORMATION This simple worst-case condition is commonly used for design, considering input/output variations and long term reliability. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design.
PAGE 16
LTC3734 APPLICATIONS INFORMATION VID Output Voltage Programming After 27µs ~ 71µs tBOOT delay, the output voltage of the regulator is digitally programmed as defined in Table 1 using the VID0 to VID5 logic input pins. The VID logic inputs program a precision, 0.25% internal feedback resistive divider. The LTC3734 has an output voltage range of 0.700V to 1.708V in 16mV steps. Refering to the Functional Diagram, there is a resistor, RVID, from VFB to ground.
PAGE 17
LTC3734 APPLICATIONS INFORMATION RUN/SS By using different value R6 resistors, VDPRSLPVR can be programmed. 1.5V (The digital input threshold voltage is 1.8V for STP_CPUB, DPRSLPVR and MCH_PG inputs.) VVID VBOOT VOUT 90% VBOOT Power Good Masking INTERNAL PG (OUTPUT OF INTERNAL POWER GOOD COMPARATOR) The PGOOD output monitors VOUT. When VOUT is not within ±10% of the set point, PGOOD is pulled low with an internal MOSFET. When VOUT is within the regulation window, PGOOD is of high impedance.
PAGE 18
LTC3734 APPLICATIONS INFORMATION Table 1. VID Output Voltage Programming VID5 VID4 VID3 VID2 VID1 VID0 LTC3734 VID5 VID4 VID3 VID2 VID1 VID0 LTC3734 0 0 0 0 0 0 1.708V 1 0 0 0 0 0 1.196V 0 0 0 0 0 1 1.692V 1 0 0 0 0 1 1.180V 0 0 0 0 1 0 1.676V 1 0 0 0 1 0 1.164V 0 0 0 0 1 1 1.660V 1 0 0 0 1 1 1.148V 0 0 0 1 0 0 1.644V 1 0 0 1 0 0 1.132V 0 0 0 1 0 1 1.628V 1 0 0 1 0 1 1.116V 0 0 0 1 1 0 1.
PAGE 19
LTC3734 APPLICATIONS INFORMATION enough period as determined by the size of the CSS, the controller will be shut down until the RUN/SS pin voltage is recycled. If the overload occurs during start-up, the time can be approximated by: tLO1 ≈ (CSS • 0.7V)/(1.5µA) = 4.6 • 105 (CSS) If the overload occurs after start-up, the voltage on CSS will continue charging and will provide additional time before latching off: tLO2 ≈ (CSS • 2V)/(1.5µA) = 1.
PAGE 20
LTC3734 APPLICATIONS INFORMATION where Rewriting this equation, we can estimate the RAVP value to be: AVP is the slope, in mV/A RSENSE is the current sense resistor R AVP ≅ m is the number of phases, m = 1 for LTC3734 R3 and RAVP are defined in Figure 6 gm is the transconductance gain for the error amplifier, it is about 4.5mmho for LTC3734. VOUT+ (12) Typically the calculation results based on these equations have ±10% tolerance. So the resistor values need to be fine tuned.
PAGE 21
LTC3734 APPLICATIONS INFORMATION output. Efficiency varies as the inverse square of VOUT for the same external components and output power level.
PAGE 22
LTC3734 APPLICATIONS INFORMATION Automotive Considerations: Plugging into the Cigarette Lighter As battery-powered devices go mobile, there is a natural interest in plugging into the cigarette lighter in order to conserve or even recharge battery packs during operation. But before you connect, be advised: you are plugging into the supply from hell. The main battery line in an automobile is the source of a number of nasty potential transients, including load-dump, reverse-battery and double-battery.
PAGE 23
LTC3734 APPLICATIONS INFORMATION The power loss dissipated by the top MOSFET can be calculated with equations 3 and 7. Using a Fairchild FDS7760 as an example: RDS(ON) = 8mΩ, QG = 55nC at 5V VGS, CRSS = 307pF, VTH(MIN) = 1V. At maximum input voltage with TJ(estimated) = 85°C at an elevated ambient temperature: PTOP = 1.5V 21V ( ) • 20A 2 • 1+ 0.005 • ( 85°C – 25°C ) • 2 0.008Ω + 21V • 20A 2 • 350kHz • 307pF • 1 1  +  = 1.
PAGE 24
LTC3734 APPLICATIONS INFORMATION PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3734. Check the following in your layout: 1) Are the signal and power grounds segregated? Keep the SGND at one end of a PC board to prevent MOSFET currents from traveling under the IC.
PAGE 25
LTC3734 TYPICAL APPLICATION Figure 9 shows a typical application using the LTC3734 to power the mobile CPU core. The input can vary from 5V to 24V; the output voltage can be programmed from 0.7V to 1.708V with a maximum current of 20A. By only modifying the external MOSFET and inductor selection, higher load current capability can be achieved. 1.708V. When the STP_CPUB signal is low, a deep sleep state is indicated and the output voltage is decreased by about 1.04%.
PAGE 26
LTC3734 PACKAGE DESCRIPTION UH Package 32-Lead Plastic QFN (5mm × 5mm) (Reference LTC DWG # 05-08-1693 Rev D) 0.70 ±0.05 5.50 ±0.05 4.10 ±0.05 3.50 REF (4 SIDES) 3.45 ± 0.05 3.45 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ± 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD 0.75 ± 0.05 R = 0.05 TYP 0.00 – 0.05 R = 0.115 TYP PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 31 32 0.40 ± 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 3.
PAGE 27
LTC3734 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 4/11 Updated Figure 9 25 Updated Related Parts 28 3734fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PAGE 28
LTC3734 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3816 Single Phase DC/DC Controller for Intel IMVP-6/6+/6.5 CPUs 7-Bit IMVP-6 VID: 0.00V ≤ VOUT ≤ 1.50V, 4.5V ≤ VIN ≤ 36V, Very Low Duty Cycle Capable LTC3732 3-Phase, 5-Bit VID, 600kHz, Synchronous Controller 5-Bit VRM 9/9.1: 1.10V ≤ VOUT ≤ 1.85V, 4.5V ≤ VIN ≤ 32V, Stage Shedding™ or Burst Mode® Operation LTC3735 2-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs 6-Bit IMVP-4 VID: 0.70V ≤ VOUT ≤ 1.708V, 4.