Datasheet

LTC3731
4
3731fc
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= V
RUN/SS
= 5V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
RUN/SS
RUN/SS Pin ON Threshold V
RUN/SS
, Ramping Positive 1 1.5 1.9 V
V
RUN/SSARM
RUN/SS Pin Arming Threshold V
RUN/SS
, Ramping Positive Until Short-Circuit
Latch-Off is Armed
3.8 4.5 V
V
RUN/SSLO
RUN/SS Pin Latch-Off Threshold V
RUN/SS
, Ramping Negative 3.2 V
I
SCL
RUN/SS Discharge Current Soft-Short Condition V
EAIN
= 0.375V, V
RUN/SS
= 4.5V –5 –1.5 µA
I
SDLHO
Shutdown Latch Disable Current V
EAIN
= 0.375V, V
RUN/SS
= 4.5V 1.5 5 µA
I
SENSE
SENSE Pins Source Current SENSE1
+
, SENSE1
, SENSE2
+
, SENSE2
, SENSE3
+
,
SENSE3
All Equal 1.2V; Current at Each Pin
13 20 µA
DF
MAX
Maximum Duty Factor In Dropout, V
SENSEMAX
≤ 30mV 95 98.5 %
TG t
R
,t
F
Top Gate Rise Time
Top Gate Fall Time
C
LOAD
= 3300pF
C
LOAD
= 3300pF
30
40
90
90
ns
ns
BG t
R
, t
F
Bottom Gate Rise Time
Bottom Gate Fall Time
C
LOAD
= 3300pF
C
LOAD
= 3300pF
30
20
90
90
ns
ns
TG/BG t
1D
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time
All Controllers, C
LOAD
= 3300pF Each Driver 50 ns
BG/TG t
2D
Bottom Gate Off to Top Gate On Delay
Top Switch-On Delay Time
All Controllers, C
LOAD
= 3300pF Each Driver 60 ns
t
ON(MIN)
Minimum On-Time Tested with a Square Wave (Note 5) 110 ns
Power Good Output Indication
V
PGL
PGOOD Voltage Output Low I
PGOOD
= 2mA, G Package
I
PGOOD
= 1.6mA, UH Package
0.1
0.5
0.3
1.0
V
V
I
PGOOD
PGOOD Output Leakage V
PGOOD
= 5V, G Package 1 µA
I
PGOOD
PGOOD/PHASMD Bias I 0 ≤ V
PHASMD/PG
≤ V
CC
, UH Package –10 ±3 10 µA
V
PGTHNEG
V
PGTHPOS
PGOOD Trip Thresholds
V
DIFFOUT
Ramping Negative
V
DIFFOUT
Ramping Positive
V
DIFFOUT
with Respect to Set Output Voltage,
HGOOD Goes Low After V
UVDLY
Delay
–7
7
–10
10
–13
13
%
%
V
PGDLY
Power Good Fault Report Delay After V
EAIN
is Forced Outside the PGOOD Thresholds 100 150 µs
Oscillator and Phase-Locked Loop
f
NOM
Nominal Frequency V
PLLFLTR
= 1.2V 360 400 440 kHz
f
LOW
Lowest Frequency V
PLLFLTR
= 0V 190 225 260 kHz
f
HIGH
Highest Frequency V
PLLFLTR
= 2.4V 600 680 750 kHz
V
PLLTH
PLLIN Input Threshold Minimum Pulse Width > 100ns 1 V
R
PLLIN
PLLIN Input Resistance 50
I
PLLFLTR
Phase Detector Output Current
Sinking Capability
Sourcing Capability
f
PLLIN
< f
OSC
f
PLLIN
> f
OSC
20
20
µA
µA
R
RELPHS
Controller 2-Controller 1 Phase
Controller 3-Controller 1 Phase
120
240
Deg
Deg
CLKOUT Controller 1 TG to CLKOUT Phase PHASMD = 0V
PHASMD = 5V
30
60
Deg
Deg