Datasheet

LTC3729
20
3729fb
Voltage Positioning
Voltage positioning can be used to minimize peak‑to‑peak
output voltage excursions under worst‑case transient
loading conditions. The open‑loop DC gain of the control
loop is reduced depending upon the maximum load step
specifications. Voltage positioning can easily be added to
the LTC3729 by loading the I
TH
pin with a resistive divider
having a Thevenin equivalent voltage source equal to the
midpoint operating voltage range of the error amplifier, or
1.2V (see Figure 8).
APPLICATIONS INFORMATION
2) INTV
CC
regulator current, 3) I
2
R losses and 4) Topside
MOSFET transition losses.
1) The V
IN
current has two components: the first is the
DC supply current given in the Electrical Characteristics
table, which excludes MOSFET driver and control currents;
the second is the current drawn from the differential
amplifier output. V
IN
current typically results in a small
(<0.1%) loss.
2) INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from INTV
CC
to ground. The resulting dQ/dt is a current out of INTV
CC
that is typically much larger than the control circuit cur‑
rent. In continuous mode, I
GATECHG
= (Q
T
+ Q
B
), where
Q
T
and Q
B
are the gate charges of the topside and bottom
side MOSFETs.
Supplying INTV
CC
power through the EXTV
CC
switch input
from an output‑derived source will scale the V
IN
current
required for the driver and control circuits by the ratio (Duty
Factor)/(Efficiency). For example, in a 20V to 5V application,
10mA of INTV
CC
current results in approximately 3mA of
V
IN
current. This reduces the mid‑current loss from 10%
or more (if the driver was powered directly from V
IN
) to
only a few percent.
3) I
2
R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous
mode the average output current flows through L and
R
SENSE
, but is “chopped” between the topside MOSFET
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R
DS(ON)
, then the resistance of
one MOSFET can simply be summed with the resistances
of L, R
SENSE
and ESR to obtain I
2
R losses. For example,
if each R
DS(ON)
=10mΩ, R
L
=10mΩ, and R
SENSE
=5mΩ,
then the total resistance is 25mΩ. This results in losses
ranging from 2% to 8% as the output current increases
from 3A to 15A per output stage for a 5V output, or a 3%
to 12% loss per output stage for a 3.3V output. Efficiency
varies as the inverse square of V
OUT
for the same external
components and output power level. The combined effects
The resistive load reduces the DC loop gain while main‑
taining the linear control range of the error amplifier.
The maximum output voltage deviation can theoretically
be reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application.
A complete explanation is included in Design Solutions
10. (See www.linear‑tech.com)
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent‑
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3729 circuits: 1) LTC3729 V
IN
current
(including loading on the differential amplifier output),
Figure 8. Active Voltage Positioning Applied to the LTC3729
I
TH
R
C
R
T1
INTV
CC
C
C
3729 F08
LTC3729
R
T2