Datasheet

LTC3728
15
3728fg
Figure 1 on the fi rst page is a basic LTC3728 application
circuit. External component selection is driven by the
load requirement, and begins with the selection of R
SENSE
and the inductor value. Next, the power MOSFETs and
D1 are selected. Finally, C
IN
and C
OUT
are selected. The
circuit shown in Figure 1 can be confi gured for operation
up to an input voltage of 28V (limited by the external
MOSFETs).
R
SENSE
Selection for Output Current
R
SENSE
is chosen based on the required output current. The
LTC3728 current comparator has a maximum threshold
of 75mV/R
SENSE
and an input common mode range of
SGND to 1.1(INTV
CC
). The current comparator threshold
sets the peak of the inductor current, yielding a maximum
average output current I
MAX
equal to the peak value less
half the peak-to-peak ripple current, ∆I
L
.
Allowing a margin for variations in the LTC3728 and external
component values yields:
R
SENSE
=
50mV
I
MAX
Because of possible PCB noise in the current sensing loop,
the AC current sensing ripple of ∆V
SENSE
= ∆I • R
SENSE
also needs to be checked in the design to get good sig-
nal-to-noise ratio. In general, for a reasonable good PCB
layout, a 15mV ∆V
SENSE
voltage is recommended as a
conservative number to start with.
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to the
internal compensation required to meet stability criterion
for buck regulators operating at greater than 50% duty
factor. A curve is provided to estimate this reduction in
peak output current level depending upon the operating
duty factor.
Operating Frequency
The LTC3728 uses a constant-frequency, phase-lockable
architecture with the frequency determined by an internal
capacitor. This capacitor is charged by a fi xed current plus
an additional current which is proportional to the voltage
applied to the PLLFLTR pin. Refer to Phase-Locked Loop
APPLICATIONS INFORMATION
and Frequency Synchronization in the Applications Infor-
mation section for additional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 5. As the operating frequency
is increased the gate charge losses will be higher, reducing
effi ciency (see Effi ciency Considerations). The maximum
switching frequency is approximately 550kHz.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is effi ciency. A higher
frequency generally results in lower effi ciency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ∆I
L
decreases with higher
inductance or frequency and increases with higher V
IN
:
I
L
=
1
(f)(L)
V
OUT
1–
V
OUT
V
IN
Accepting larger values of ∆I
L
allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆I
L
=0.3(I
MAX
) or higher for good
Figure 5. PPLFLTR Pin Voltage vs Frequency
OPERATING FREQUENCY (kHz)
200 250 300 350 550400 450 500
PLLFLTR PIN VOLTAGE (V)
3728 F05
2.5
2.0
1.5
1.0
0.5
0