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LTC3728

3728fc

Dual, 550kHz, 2-Phase

Synchronous Step-Down Switching Regulator

Figure 1. High Efficiency Dual 5V/3.3V Step-Down Converter

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Dual, 180° Phased Controllers Reduce Required

Input Capacitance and Power Supply Induced Noise

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OPTI-LOOP

Compensation Minimizes C

OUT

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±1% Output Voltage Accuracy

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Power Good Output Voltage Indicator

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Phase-Lockable Fixed Frequency 250kHz to 550kHz

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Dual N-Channel MOSFET Synchronous Drive

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Wide V

Range: 3.5V to 36V Operation

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Very Low Dropout Operation: 99% Duty Cycle

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Adjustable Soft-Start Current Ramping

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Foldback Output Current Limiting

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Latched Short-Circuit Shutdown with Defeat Option

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Output Overvoltage Protection

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Remote Output Voltage Sense

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Low Shutdown I

: 20µA

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5V and 3.3V Regulators

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3 Selectable Operating Modes: Constant Frequency,

Burst Mode

Operation and PWM

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Available in 32-Pin 5mm × 5mm QFN and

28-Pin SSOP Packages

The LTC

3728 is a dual high performance step-down

switching regulator controller that drives all N-channel

synchronous power MOSFET stages. A constant fre-

quency current mode architecture allows phase-lockable

frequency of up to 550kHz. Power loss and noise due to

the ESR of the input capacitors are minimized by operating

the two controller output stages out of phase.

OPTI-LOOP compensation allows the transient response

to be optimized over a wide range of output capacitance and

ESR values. The precision 0.8V reference and power good

output indicator are compatible with future microproces-

sor generations, and a wide 3.5V to 30V (36V maximum)

input supply range encompasses all battery chemistries.

A RUN/SS pin for each controller provides both soft-start

and optional timed, short-circuit shutdown. Current

foldback limits MOSFET dissipation during short-circuit

conditions when overcurrent latchoff is disabled. Output

overvoltage protection circuitry latches on the bottom

MOSFET until V

OUT

returns to normal. The FCB mode pin

can select among Burst Mode, constant frequency mode

and continuous inductor current mode or regulate a

secondary winding. The LTC3728 includes a power good

output pin that indicates when both outputs are within

7.5% of their designed set point.

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Notebook and Palmtop Computers

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Telecom Systems

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Portable Instruments

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Battery-Operated Digital Devices

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DC Power Distribution Systems

APPLICATIO S

TYPICAL APPLICATIO

DESCRIPTIO

FEATURES

4.7µF

, 0.1µF

105k

1000pF

3.2µH

220pF

1µF

22µF

50V

OUT1

47µF

SENSE1

0.01Ω

20k

15k

OUT1

, 0.1µF

63.4k

3.2µH

220pF

1000pF

OUT

56µF

SENSE2

0.01Ω

20k

15k

OUT2

3.3V

TG1 TG2

BOOST1 BOOST2

SW1 SW2

BG1 BG2

SGND

PGND

SENSE1

SENSE2

SENSE1

–

SENSE2

–

OSENSE1

OSENSE2

TH1

TH2

PGOOD INTV

RUN/SS1 RUN/SS2

5.2V TO 28V

M1, M2: FDS6982S

3728 F01

SS1

0.1µF

SS2

0.1µF

LTC3728

PLLIN

500kHz

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents, including 5481178, 5929620, 6177787, 6144194, 6100678,

5408150, 6580258, 6304066, 5705919.

Summary of content (32 pages)

PAGE 1
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U FEATURES LTC3728 Dual, 550kHz, 2-Phase Synchronous Step-Down Switching Regulator DESCRIPTIO The LTC®3728 is a dual high performance step-down switching regulator controller that drives all N-channel synchronous power MOSFET stages. A constant frequency current mode architecture allows phase-lockable frequency of up to 550kHz. Power loss and noise due to the ESR of the input capacitors are minimized by operating the two controller output stages out of phase.
PAGE 2
LTC3728 W W W AXI U U ABSOLUTE RATI GS (Note 1) Input Supply Voltage (VIN).........................36V to – 0.3V Top Side Driver Voltages (BOOST1, BOOST2) ...................................42V to – 0.3V Switch Voltage (SW1, SW2) .........................36V to – 5V INTVCC, EXTVCC, RUN/SS1, RUN/SS2, (BOOST1-SW1), (BOOST2-SW2), PGOOD .............................7V to – 0.3V SENSE1+, SENSE2 +, SENSE1–, SENSE2 – Voltages ........................ (1.1)INTVCC to – 0.3V PLLIN, PLLFLTR, FCB, Voltage ....
PAGE 3
LTC3728 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN/SS1, 2 = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS gm1, 2 Transconductance Amplifier gm ITH1, 2 = 1.2V; Sink/Source 5uA; (Note 3) gmGBW1, 2 Transconductance Amplifier GBW ITH1, 2 = 1.
PAGE 4
LTC3728 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN/SS1, 2 = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 3.25 3.35 3.45 V 0.5 2 % 0.05 0.2 % 10 50 µA 0.1 0.3 V ±1 µA – 9.5 9.5 % % 3.3V Linear Regulator ● V3.3OUT 3.3V Regulator Output Voltage No Load V3.3IL 3.3V Regulator Load Regulation I3.3 = 0 to 10mA V3.3VL 3.
PAGE 5
LTC3728 U W TYPICAL PERFOR A CE CHARACTERISTICS Supply Current vs Input Voltage and Mode (Figure 13) 1000 600 BOTH CONTROLLERS ON 400 200 5.05 INTVCC AND EXTVCC SWITCH VOLTAGE (V) EXTVCC VOLTAGE DROP (mV) 250 800 SUPPLY CURRENT (µA) INTVCC and EXTVCC Switch Voltage vs Temperature EXTVCC Voltage Drop 200 150 100 50 SHUTDOWN 0 0 0 5 20 15 10 25 INPUT VOLTAGE (V) 30 35 0 10 30 20 CURRENT (mA) 40 4.85 4.80 EXTVCC SWITCHOVER THRESHOLD 4.75 4.
PAGE 6
LTC3728 U W TYPICAL PERFOR A CE CHARACTERISTICS Load Regulation SENSE Pins Total Source Current 100 VOSENSE = 0.7V FCB = 0V VIN = 15V 2.0 –0.2 50 ISENSE (µA) –0.1 VITH (V) NORMALIZED VOUT (%) VITH vs VRUN/SS 2.5 0.0 1.5 1.0 –0.3 0 –50 0.5 –0.
PAGE 7
LTC3728 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Source/Capacitor Instantaneous Current (Figure 13) IIN 2A/DIV VIN 200mV/DIV Constant Frequency (Burst Inhibit) Operation (Figure 13) Burst Mode Operation (Figure 13) VOUT 20mV/DIV VOUT 20mV/DIV VSW1 10V/DIV VSW2 10V/DIV IL 0.5A/DIV VIN = 15V 1µs/DIV VOUT = 5V VPLLFLTR = 0V IOUT5 = IOUT3.
PAGE 8
LTC3728 U U U PI FU CTIO S G Package/UH Package RUN/SS1, RUN/SS2 (Pins 1, 15/Pins 28, 13): Combination of soft-start, run control inputs and short-circuit detection timers. A capacitor to ground at each of these pins sets the ramp time to full output current. Forcing either of these pins back below 1.0V causes the IC to shut down the circuitry required for that particular controller. Latchoff overcurrent protection is also invoked via this pin as described in the Applications Information section.
PAGE 9
LTC3728 W FU CTIO AL DIAGRA U U PLLIN FIN VIN INTVCC PHASE DET DUPLICATE FOR SECOND CONTROLLER CHANNEL 50k BOOST DB PLLFLTR DROP OUT DET CLK1 RLP OSCILLATOR CLK2 CLP – 0.86V S Q R Q BOT VOSENSE1 – 0.86V TOP ON SWITCH LOGIC + 0.55V INTVCC BG COUT PGND B – + + SHDN VOSENSE2 CIN SW BOT 0.74V + D1 – + CB FCB + PGOOD TG TOP VOUT RSENSE – VSEC + 1.5V 4.5V 0.18µA I1 – + R6 0.74V – BINH FCB – 3.3VOUT + 0.8V – ++ FCB SLOPE COMP – 45k 2.
PAGE 10
LTC3728 U OPERATIO (Refer to Functional Diagram) increase until the average inductor current matches the new load current. After the top MOSFET has turned off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by current comparator I2, or the beginning of the next cycle. The top MOSFET drivers are biased from floating bootstrap capacitor CB, which normally is recharged during each off cycle through an external diode when the top MOSFET turns off.
PAGE 11
LTC3728 U OPERATIO (Refer to Functional Diagram) INTVCC/EXTVCC Power Power for the top and bottom MOSFET drivers and most other internal circuitry is derived from the INTVCC pin. When the EXTVCC pin is left open, an internal 5V low dropout linear regulator supplies INTVCC power. If EXTVCC is taken above 4.7V, the 5V regulator is turned off and an internal switch is turned on connecting EXTVCC to INTVCC.
PAGE 12
LTC3728 U OPERATIO (Refer to Functional Diagram) 5V SWITCH 20V/DIV 3.3V SWITCH 20V/DIV INPUT CURRENT 5A/DIV INPUT VOLTAGE 500mV/DIV IIN(MEAS) = 2.53ARMS IIN(MEAS) = 1.55ARMS DC236 F03a DC236 F03b (a) (b) Figure 3. Input Waveforms Comparing Single-Phase (a) and 2-Phase (b) Operation for Dual Switching Regulators Converting 12V to 5V and 3.3V at 3A Each.
PAGE 13
LTC3728 U W U U APPLICATIO S I FOR ATIO 2.5 2.0 PLLFLTR PIN VOLTAGE (V) Figure 1 on the first page is a basic LTC3728 application circuit. External component selection is driven by the load requirement, and begins with the selection of RSENSE and the inductor value. Next, the power MOSFETs and D1 are selected. Finally, CIN and COUT are selected. The circuit shown in Figure 1 can be configured for operation up to an input voltage of 28V (limited by the external MOSFETs). 1.5 1.0 0.
PAGE 14
LTC3728 U W U U APPLICATIO S I FOR ATIO The inductor value also has secondary effects. The transition to Burst Mode operation begins when the average inductor current required results in a peak current below 25% of the current limit determined by RSENSE. Lower inductor values (higher ∆IL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation.
PAGE 15
LTC3728 U W U U APPLICATIO S I FOR ATIO synchronous MOSFET losses are greatest at high input voltage when the top switch duty factor is low or during a short-circuit when the synchronous switch is on close to 100% of the period. The term (1+δ) is generally given for a MOSFET in the form of a normalized RDS(ON) vs Temperature curve, but δ = 0.005/°C can be used as an approximation for low voltage MOSFETs. CRSS is usually specified in the MOSFET characteristics. The constant k = 1.
PAGE 16
LTC3728 U W U U APPLICATIO S I FOR ATIO The benefit of the LTC3728 multiphase can be calculated by using the equation above for the higher power controller and then calculating the loss that would have resulted if both controller channels switch on at the same time. The total RMS power lost is lower when both controllers are operating due to the interleaving of current pulses through the input capacitor’s ESR.
PAGE 17
LTC3728 U W U U APPLICATIO S I FOR ATIO INTVCC Regulator EXTVCC Connection An internal P-channel low dropout regulator produces 5V at the INTVCC pin from the VIN supply pin. INTVCC powers the drivers and internal circuitry within the LTC3728. The INTVCC pin regulator can supply a peak current of 50mA and must be bypassed to ground with a minimum of 4.7µF tantalum, 10µF special polymer, or low ESR type electrolytic capacitor.
PAGE 18
LTC3728 U W U U APPLICATIO S I FOR ATIO winding as shown in Figure 6a or the capacitive charge pump shown in Figure 6b. The charge pump has the advantage of simple magnetics. Topside MOSFET Driver Supply (CB, DB) External bootstrap capacitors CB connected to the BOOST pins supply the gate drive voltages for the topside MOSFETs. Capacitor CB in the functional diagram is charged though external diode DB from INTVCC when the SW pin is low.
PAGE 19
LTC3728 U W U U APPLICATIO S I FOR ATIO R1(MAX) VIN ⎞ ⎛ 0.8V = 24k⎜ ⎟ ⎝ 2.4V – VOUT ⎠ 3.3V OR 5V INTVCC RUN/SS RSS* D1 RSS* RUN/SS CSS for VOUT < 2.4V Regulating an output voltage of 1.8V, the maximum value of R1 should be 32K. Note that for an output voltage above 2.4V, R1 has no maximum value necessary to absorb the sense currents; however, R1 is still bounded by the VOSENSE feedback current. CSS *OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF (a) (b) 3728 F07 Figure 7.
PAGE 20
LTC3728 U W U U APPLICATIO S I FOR ATIO Why should you defeat overcurrent latchoff? During the prototyping stage of a design, there may be a problem with noise pickup or poor layout causing the protection circuit to latch off. Defeating this feature will easily allow troubleshooting of the circuit and PC layout. The internal short-circuit and foldback current limiting still remains active, thereby protecting the power supply system from failure.
PAGE 21
LTC3728 U W U U APPLICATIO S I FOR ATIO The phase detector used is an edge sensitive digital type which provides zero degrees phase shift between the external and internal oscillators. This type of phase detector will not lock up on input frequencies close to the harmonics of the VCO center frequency. The PLL hold-in range, ∆fH, is equal to the capture range, ∆fC: ∆fH = ∆fC = ±0.
PAGE 22
LTC3728 U W U U APPLICATIO S I FOR ATIO power from the auxiliary windings. With the loop in continuous mode, the auxiliary outputs may nominally be loaded without regard to the primary output load. The secondary output voltage VSEC is normally set as shown in Figure 6a by the turns ratio N of the transformer: VSEC ≅ (N + 1) VOUT However, if the controller goes into Burst Mode operation and halts switching due to a light primary load current, then VSEC will droop.
PAGE 23
LTC3728 U W U U APPLICATIO S I FOR ATIO which excludes MOSFET driver and control currents; the second is the current drawn from the 3.3V linear regulator output. VIN current typically results in a small (<0.1%) loss. 2. INTVCC current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from INTVCC to ground.
PAGE 24
LTC3728 U W U U APPLICATIO S I FOR ATIO overshoot seen at this pin. The bandwidth can also be estimated by examining the rise time at the pin. The ITH external components shown in the Figure 1 circuit will provide an adequate starting point for most applications. The ITH series RC-CC filter sets the dominant pole-zero loop compensation. The values can be modified slightly (from 0.
PAGE 25
LTC3728 U W U U APPLICATIO S I FOR ATIO Design Example As a design example for one channel, assume VIN = 12V(nominal), VIN = 22V(max), VOUT = 1.8V, IMAX = 5A, and f = 300kHz. The inductance value is chosen first based on a 30% ripple current assumption. The highest value of ripple current occurs at the maximum input voltage. Tie the PLLFLTR pin to a resistive divider using the INTVCC pin generating 1V for 300kHz operation.
PAGE 26
LTC3728 U W U U APPLICATIO S I FOR ATIO PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3728. These items are also illustrated graphically in the layout diagram of Figure 10. The Figure 11 illustrates the current waveforms present in the various branches of the 2-phase synchronous regulators operating in the continuous mode. Check the following in your layout: 1.
PAGE 27
LTC3728 U W U U APPLICATIO S I FOR ATIO SW1 L1 D1 RSENSE1 COUT1 VOUT1 + RL1 VIN RIN CIN + SW2 BOLD LINES INDICATE HIGH, SWITCHING CURRENT LINES. KEEP LINES TO A MINIMUM LENGTH. D2 L2 RSENSE2 COUT2 VOUT2 + RL2 3728 F11 Figure 11. Branch Current Waveforms signal ground. The R2 and R4 connections should not be along the high current input feeds from the input capacitor(s).
PAGE 28
LTC3728 U W U U APPLICATIO S I FOR ATIO 7. Use a modified “star ground” technique: a low impedance, large copper area central grounding point on the same side of the PC board as the input and output capacitors with tie-ins for the bottom of the INTVCC decoupling capacitor, the bottom of the voltage feedback resistive divider and the SGND pin of the IC. PC Board Layout Debugging Start with one controller on at a time.
PAGE 29
LTC3728 U TYPICAL APPLICATIO S 59k 1M 100k 0.1µF 2 1000pF 180pF 20k 1% 3 105k, 1% 4 5 6 33pF 15k 1000pF 9 33pF 3.3V 10 11 15k 1000pF 12 20k 1% 13 63.4k 1% 180pF 1000pF 14 SENSE1 + TG1 SENSE1 – SW1 VOSENSE1 BOOST1 PLLFLTR VIN BG1 PLLIN EXTVCC FCB LTC3728 ITH1 SGND 3.3VOUT ITH2 INTVCC PGND BG2 BOOST2 VOSENSE2 SW2 SENSE2 – TG2 SENSE2 + RUN/SS2 + 0.015Ω 27 VOUT1 5V 3A; 4A PEAK 26 8 M1 0.
PAGE 30
LTC3728 U TYPICAL APPLICATIO S 0.1µF 27pF 20k 1% 10k 2 105k 1% 1000pF 3 4 0.01µF 5 1000pF fSYNC 7 8 220pF 9 33pF 3.3V 10 11 15k 220pF 12 20k 1% 27pF 13 63.4k 1% 1000pF 14 SENSE1 + TG1 SENSE1 – SW1 VOSENSE1 BOOST1 PLLFLTR VIN PLLIN BG1 FCB EXTVCC LTC3728 ITH1 INTVCC SGND PGND 3.3VOUT BG2 BOOST2 ITH2 VOSENSE2 SW2 – TG2 SENSE2 + RUN/SS2 SENSE2 L1 8µH PGOOD 27 0.015Ω 26 0.1µF 25 24 M1 47µF 6.3V 23 10Ω 22 CMDSH-3TR 22µF 50V 0.1µF GND 21 20 1µF 10V 4.
PAGE 31
LTC3728 U PACKAGE DESCRIPTIO (For purposes of clarity, drawings are not to scale) G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 9.90 – 10.50* (.390 – .413) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1.25 ±0.12 7.8 – 8.2 5.3 – 5.7 0.42 ±0.03 7.40 – 8.20 (.291 – .323) 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 RECOMMENDED SOLDER PAD LAYOUT 2.0 (.079) MAX 5.00 – 5.60** (.197 – .221) 0° – 8° 0.09 – 0.25 (.0035 – .010) 0.65 (.0256) BSC 0.55 – 0.95 (.022 – .037) NOTE: 1.
PAGE 32
LTC3728 U TYPICAL APPLICATIO IIN 12VIN CIN I1 OPEN PHASMD TG1 U1 TG2 LTC3729 90° 0° IIN* BUCK: 2.5V/15A 180° BUCK: 2.5V/15A I1 2.5VO/30A I2 CLKOUT I2 I3 I3 TG1 U2 TG2 LTC3728 90° 90° BUCK: 1.5V/15A 270° BUCK: 1.8V/15A 1.5VO/15A I4 PLLIN I4 1.8VO/15A 3728 F14 *INPUT RIPPLE CURRENT CANCELLATION INCREASES THE RIPPLE FREQUENCY AND REDUCES THE RMS INPUT RIPPLE CURRENT THUS, SAVING INPUT CAPACITORS Figure 14.