Datasheet

16
LTC3718
3718fa
APPLICATIO S I FOR ATIO
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discharge C
OUT
generating a feedback error signal used
by the regulator to return V
OUT
to its steady-state value.
During this recovery time, V
OUT
can be monitored for
overshoot or ringing that would indicate a stability
problem. The I
TH
pin external components shown in
Figure 1 will provide adequate compensation for most
applications. For a detailed explanation of switching
control loop theory see Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: V
IN
= 2.5V, V
OUT
= 1.25V ±100mV,
I
OUT(MAX)
= ±6A, f = 300kHz. First, calculate the timing
resistor with V
ON
= V
OUT
:
R
VV
V kHz pF
k
ON
=
−
=
25 07
2 5 300 10
240
..
( . )( )( )
Next, use a standard value of 237k and choose the inductor
for about 40% ripple current at the maximum V
IN
:
L
V
kHz A
V
V
H=






=µ
125
300 0 4 6
1
125
25
087
.
( )( . )( )
–
.
.
.
Selecting a standard value of 1µH results in a maximum
ripple current of:
∆=
µ






=I
V
kHz H
V
V
A
L
125
300 1
1
125
25
21
.
()()
–
.
.
.
Next, choose the synchronous MOSFET switch. Choosing
an IRF7811A (R
DS(ON)
= 0.013Ω, C
RSS
= 60pF, θ
JA
=
50°C/W) yields a nominal sense voltage of:
V
SNS(NOM)
= (6A)(1.3)(0.013Ω) = 101.4mV
Tying V
RNG
to 1V will set the current sense voltage range
for a nominal value of 100mV with current limit occurring
at 133mV. To check if the current limit is acceptable,
assume a junction temperature of about 10°C above a
50°C ambient with ρ
60°C
= 1.15:
I
mV
AA
LIMIT
≥
Ω
+=
133
1 15 0 013
1
2
21 99
(. )(. )
(. ) .
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same R
DS(ON)
, then the
resistance of one MOSFET can simply be summed with the
resistances of L and the board traces to obtain the DC I
2
R
loss. For example, if R
DS(ON)
= 0.01Ω and R
L
= 0.005Ω, the
loss will range from 1% up to 10% as the output current
varies from 1A to 10A for a 1.5V output.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET capaci-
tance, among other factors. The loss is significant at input
voltages above 20V and can be estimated from:
Transition Loss ≅ (1.7A
–1
) V
IN
2
I
OUT
C
RSS
f
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents.
4. C
IN
loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I
2
R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
Other losses, including C
OUT
ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to ∆I
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
. ∆I
LOAD
also begins to charge or