Datasheet

16
LTC3717
sn3717 3717fs
Figure 7. LTC3717 Layout Diagram
16
15
14
13
12
11
10
9
C
C2
BOLD LINES INDICATE HIGH CURRENT PATHS
C
C1
C
SS
C
FB
C
ION
R
ON
R
C
R
F
3717F07
1
2
3
4
5
6
7
8
RUN/SS
PGOOD
V
RNG
I
TH
SGND
I
ON
V
FB
V
REF
BOOST
TG
SW
PGND
BG
INTV
CC
V
CC
EXTV
CC
C
B
M2
M1
D1
D2
D
B
C
F
C
VCC
C
OUT
C
IN
V
IN
V
OUT
+
–
+
–
LTC3717
L
+
APPLICATIO S I FOR ATIO
WUUU
• Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power component. You can connect the copper areas to
any DC net (V
IN
, V
OUT
, GND or to any other DC rail in
your system).
When laying out a printed circuit board, without a ground
plane, use the following checklist to ensure proper opera-
tion of the controller. These items are also illustrated in
Figure 7.
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
one point which is then tied to the PGND pin close to the
source of M2.
• Place M2 as close to the controller as possible, keeping
the PGND, BG and SW traces short.
• Connect the input capacitor(s) C
IN
close to the power
MOSFETs. This capacitor carries the MOSFET AC cur-
rent.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Connect the INTV
CC
decoupling capacitor C
VCC
closely
to the INTV
CC
and PGND pins.
• Connect the top driver boost capacitor C
B
closely to the
BOOST and SW pins.
• Connect the V
CC
pin decoupling capacitor C
F
closely to
the V
CC
and PGND pins.