Datasheet

LTC3714
25
3714f
Figure 11. General Layout of External Power Components
SW
SENSE
V
IN
M1 M2
D1
M2
M2
M1
C
IN
C
IN
C
IN
C
IN
C
OUT
R
SENSE
L1
C
OUT
C
OUT
C
OUT
V
OUT
PGND
TO PGND
(PIN 2)
TO SENSE
(PIN 3)
3714 F11
PGND
applicaTions inForMaTion
These items are also illustrated in Figures 10 and 11.
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
one point which is then tied to the PGND pin close to
the source of M2.
• Place M2 as close to the controller as possible, keeping
the PGND, BG and SENSE traces short.
• Connect the input capacitor(s) C
IN
close to the power
MOSFETs. This capacitor carries the MOSFET AC
current.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Connect the INTV
CC
decoupling capacitor C
VCC
closely
to the INTV
CC
and PGND pins.
• Connect the top driver boost capacitor C
B
closely to
the BOOST and SW pins.
• Connect the V
IN
pin decoupling capacitor C
F
closely to
the V
IN
and PGND pins.
• VID0-VID4 interface circuitry must return to SGND.