Datasheet

LTC3707-SYNC
27
3707sfa
6. Keep the switching nodes (SW1, SW2), top gate nodes
(TG1, TG2), and boost nodes (BOOST1, BOOST2) away
from sensitive small-signal nodes, especially from the
opposites channel’s voltage and current sensing feedback
pins. All of these nodes have very large and fast moving
signals and therefore should be kept on the “output side”
of the IC and occupy minimum PC trace area.
7. Use a modifi ed “star ground” technique: a low impedance,
large copper area central grounding point on the same side
of the PC board as the input and output capacitors with
tie-ins for the bottom of the INTV
CC
decoupling capacitor,
the bottom of the voltage feedback resistive divider and
the SGND pin of the IC.
APPLICATIONS INFORMATION
PC Board Layout Debugging
Start with one controller on at a time. It is helpful to use
a DC-50MHz current probe to monitor the current in the
inductor while testing the circuit. Monitor the output
switching node (SW pin) to synchronize the oscilloscope
to the internal oscillator and probe the actual output voltage
as well. Check for proper performance over the operating
voltage and current range expected in the application. The
frequency of operation should be maintained over the input
voltage range down to dropout and until the output load
drops below the low current operation threshold—typically
10% to 20% of the maximum designed current level in
Burst Mode operation.
Figure 11. Branch Current Waveforms
R
L1
D1
L1
SW1
R
SENSE1
V
OUT1
C
OUT1
+
V
IN
C
IN
R
IN
+
R
L2
D2
BOLD LINES INDICATE
HIGH, SWITCHING
CURRENT LINES.
KEEP LINES TO A
MINIMUM LENGTH.
L2
SW2
3707 F11
R
SENSE2
V
OUT2
C
OUT2
+