Datasheet

LTC3707-SYNC
22
3707sfa
The secondary output voltage V
SEC
is normally set as shown
in Figure 6a by the turns ratio N of the transformer:
V
SEC
≅ (N + 1) V
OUT
However, if the controller goes into Burst Mode operation
and halts switching due to a light primary load current, then
V
SEC
will droop. An external resistive divider from V
SEC
to
the FCB pin sets a minimum voltage V
SEC(MIN)
:
VV
R
R
SEC MIN()
.≈+
⎛
⎝
⎜
⎞
⎠
⎟
08 1
6
5
where R5 and R6 are shown in Figure 2.
If V
SEC
drops below this level, the FCB voltage forces
temporary continuous switching operation until V
SEC
is
again above its minimum.
In order to prevent erratic operation if no external connec-
tions are made to the FCB pin, the FCB pin has a 0.18μA
internal current source pulling the pin high. Include this
current when choosing resistor values R5 and R6.
The following table summarizes the possible states
available on the FCB pin:
Table 1
FCB PIN CONDITION
0V to 0.75V Forced Continuous Both Controllers
(Current Reversal Allowed—
Burst Inhibited)
0.85V < V
FCB
< 4.3V Minimum Peak Current Induces
Burst Mode Operation
No Current Reversal Allowed
Feedback Resistors Regulating a Secondary Winding
>4.8V Burst Mode Operation Disabled
Constant Frequency Mode Enabled
No Current Reversal Allowed
No Minimum Peak Current
Voltage Positioning
Voltage positioning can be used to minimize peak-to-peak
output voltage excursions under worst-case transient
loading conditions. The open-loop DC gain of the control
loop is reduced depending upon the maximum load step
specifi cations. Voltage positioning can easily be added to
the controller by loading the I
TH
pin with a resistive divider
having a Thevenin equivalent voltage source equal to the
APPLICATIONS INFORMATION
midpoint operating voltage range of the error amplifi er, or
1.2V (see Figure 8).
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifi er.
The maximum output voltage deviation can theoretically
be reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application.
A complete explanation is included in Design Solutions
10. (See www.linear-tech.com)
I
TH
R
C
R
T1
INTV
CC
C
C
3707 F08
LTC3707-SYNC
R
T2
Figure 8. Active Voltage Positioning Applied
to the LTC3707-SYNC
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
%Effi ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in application circuits: 1) IC V
IN
current (including
loading on the 3.3V internal regulator), 2) INTV
CC
regulator
current, 3) I
2
R losses, 4) Topside MOSFET transition
losses.
1. The V
IN
current has two components: the fi rst is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; the
second is the current drawn from the 3.3V linear regulator
output. V
IN
current typically results in a small (<0.1%)
loss.