Datasheet

LTC3707-SYNC
10
3707sfa
OPERATION
turns off. As V
IN
decreases to a voltage close to V
OUT
,
the loop may enter dropout and attempt to turn on the
top MOSFET continuously. The dropout detector detects
this and forces the top MOSFET off for about 400ns every
tenth cycle to allow C
B
to recharge.
The main control loop is shut down by pulling the RUN/
SS pin low. Releasing RUN/SS allows an internal 1.2μA
current source to charge soft-start capacitor C
SS
. When
C
SS
reaches 1.5V, the main control loop is enabled with
the I
TH
voltage clamped at approximately 30% of its
maximum value. As C
SS
continues to charge, the I
TH
pin
voltage is gradually released allowing normal, full-current
operation. When both RUN/SS1 and RUN/SS2 are low, all
controller functions are shut down, including the 5V and
3.3V regulators.
Low Current Operation
The FCB pin is a multifunction pin providing two functions:
1) to provide regulation for a secondary winding by
temporarily forcing continuous PWM operation on both
controllers; and 2) select between two modes of low current
operation. When the FCB pin voltage is below 0.8V, the
controller forces continuous PWM current mode operation.
In this mode, the top and bottom MOSFETs are alternately
turned on to maintain the output voltage independent
of direction of inductor current. When the FCB pin is
below V
INTVCC
– 2V but greater than 0.8V, the controller
enters Burst Mode operation. Burst Mode operation sets
a minimum output current level before inhibiting the top
switch and turns off the synchronous MOSFET(s) when
the inductor current goes negative. This combination of
requirements will, at low currents, force the I
TH
pin below
a voltage threshold that will temporarily inhibit turn-on of
both output MOSFETs until the output voltage drops. There
is 60mV of hysteresis in the burst comparator B tied to
the I
TH
pin. This hysteresis produces output signals to the
MOSFETs that turn them on for several cycles, followed by
a variable “sleep” interval depending upon the load current.
The resultant output voltage ripple is held to a very small
value by having the hysteretic comparator after the error
amplifi er gain block.
Frequency Synchronization
The phase-locked loop allows the internal oscillator to
be synchronized to an external source via the PLLIN pin.
The output of the phase detector at the PLLFLTR pin is
also the DC frequency control input of the oscillator that
operates over a 140kHz to 310kHz range corresponding
to a DC voltage input from 0V to 2.4V. When locked, the
PLL aligns the turn on of the top MOSFET to the rising
edge of the synchronizing signal. When PLLIN is left
open, the PLLFLTR pin goes low, forcing the oscillator to
minimum frequency.
Continuous Current (PWM) Operation
Tying the FCB pin to ground will force continuous current
operation. This is the least effi cient operating mode, but
may be desirable in certain applications. The output can
source or sink current in this mode. When sinking current
while in forced continuous operation, current will be forced
back into the main power supply potentially boosting the
input supply to dangerous voltage levels—BEWARE!
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTV
CC
pin. When
the EXTV
CC
pin is left open, an internal 5V low dropout
linear regulator supplies INTV
CC
power. If EXTV
CC
is taken
above 4.7V, the 5V regulator is turned off and an internal
switch is turned on connecting EXTV
CC
to INTV
CC
. This al-
lows the INTV
CC
power to be derived from a high effi ciency
external source such as the output of the regulator itself
or a secondary winding, as described in the Applications
Information section.
(Refer to Functional Diagram)