Datasheet

LTC3707
28
3707fb
APPLICATIONS INFORMATION
4. Are the SENSE
–
and SENSE
+
leads routed together with
minimum PC trace spacing? The fi lter capacitor between
SENSE
+
and SENSE
–
should be as close as possible to
the IC. Ensure accurate current sensing with Kelvin con-
nections at the SENSE resistor.
5. Is the INTV
CC
decoupling capacitor connected close to
the IC, between
the INTV
CC
and the power ground pins?
This capacitor carries the MOSFET drivers current peaks.
An additional 1µF ceramic capacitor placed immediately
next to the INTV
CC
and PGND pins can help improve noise
performance substantially.
6. Keep the switching nodes (SW1, SW2), top gate nodes
(TG1, TG2), and boost nodes (BOOST1, BOOST2) away
from sensitive small-signal nodes, especially from the
opposites channel’s voltage and current sensing feedback
pins. All of these nodes have very large and fast moving
signals and therefore should be kept on the “output side”
of the LTC3707 and occupy minimum PC trace area.
7. Use a modifi ed “star ground” technique: a low imped-
ance, large copper area central grounding point on the same
side of the PC board as the input and output capacitors with
tie-ins for the bottom of the INTV
CC
decoupling capacitor,
the bottom of the voltage feedback resistive divider and
the SGND pin of the IC.
R
L1
D1
L1
SW1
R
SENSE1
V
OUT1
C
OUT1
+
V
IN
C
IN
R
IN
+
R
L2
D2
BOLD LINES INDICATE
HIGH, SWITCHING
CURRENT LINES.
KEEP LINES TO A
MINIMUM LENGTH.
L2
SW2
3707 F11
R
SENSE2
V
OUT2
C
OUT2
+
Figure 11. Branch Current Waveforms