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LTC3704
3704fb
APPLICATIO S I FOR ATIO
WUUU
PC Board Layout Checklist
1. In order to minimize switching noise and improve
output load regulation, the GND pin of the LTC3704
should be connected directly to 1) the negative termi-
nal of the INTV
CC
decoupling capacitor, 2) the negative
terminal of the output decoupling capacitors, 3) the
source of the power MOSFET or the bottom terminal of
the sense resistor, 4) the negative terminal of the input
capacitor and 5) at least one via to the ground plane
immediately adjacent to Pin 6. The ground trace on the
top layer of the PC board should be as wide and short
as possible to minimize series resistance and induc-
tance.
LTC3704
M1
V
IN
3704 F??
V
OUT
L1
R
T
R
C
C
C1
R3
C
IN
C
OUT
C
VCC
R1
R2
PSEUDO-KELVIN
SIGNAL GROUND
CONNECTION
TRUE REMOTE
OUTPUT SENSING
VIAS TO GROUND
PLANE
R4
PIN 1
C
OUT
D1
L2
C
DC
C3
C
C2
1
2
3
4
5
6
12
11
10
9
8
7
Figure 22. LTC3704 Positive-to-Negative Converter Suggested Layout
RUN
I
TH
NFB
FREQ
MODE/
SYNC
SENSE
V
IN
INTV
CC
GATE
GND
LTC3704
R4
10
9
8
7
6
1
2
3
4
5
C
VCC
PSEUDO-KELVIN
GROUND CONNECTION
C
IN
M1
D1
L1
V
IN
GND
3704 F23
C
OUT
R
C
R1
R
T
BOLD LINES INDICATE HIGH CURRENT PATHS
R2
C
C1
R3
+
C3
L2
C
DC
V
OUT
C
C2
Figure 23. LTC3704 Positive-to-Negative Converter Layout Diagram
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