Datasheet

LTC3677-3
38
36773f
operaTion
Power Down via Pushbutton Timing
The timing diagram, Figure 15, shows the LTC3677-3
powering down by μC/μP control. For this example the
pushbutton circuitry starts in the PON state with V
OUT
not in UVLO and Buck1, Buck2 and LDO2 enabled. In
this case the pushbutton is applied (ON LOW) for at least
50ms, which generates a low impedance on the PBSTAT
output. After receiving the PBSTAT the μC/μP will drive
the PWR_ON input LOW. 50ms after PWR_ON goes LOW
the pushbutton circuitry will enter the PDN state. Buck1,
Buck2 and LDO2 are disabled together upon entering the
PDN state. After entering the PDN state, a 1 second wait
time is initiated before entering the POFF state. During
this 1 second time ON and PWR_ON inputs are ignored
to allow all LTC3677-3 generated supplies to go LOW.
Upon entering the PDN state Buck3 is disabled and the
I
2
C registers are cleared. Holding ON LOW through the
1 second power-down period will not cause a power-up
event at end of the 1 second period. The ON input must be
brought HIGH following the power-down event and then
go LOW again to establish a valid power-up event.
V
OUT
UVLO Power-Down Timing
If V
OUT
drops below the V
OUT
UVLO threshold, the push-
button circuitry will transition from the PON state to the
PDN state. Buck1, Buck2 and LDO2 are disabled together
upon entering the PDN state. After entering the PDN state,
a 1 second wait time is initiated before entering the POFF
state. During this 1 second time ON and PWR_ON inputs
are ignored to allow all LTC3677-3 generated supplies to
go LOW.
Upon entering the PDN state the Buck3 is disabled and
the I
2
C registers are cleared. LDO1 is also disabled by
the V
OUT
UVLO and stays disabled as long as the V
OUT
UVLO condition remains. Note that it is not possible to
sequence any of the supplies up while the V
OUT
UVLO
condition exists. LDO1 will be re-enabled when the
V
OUT
UVLO condition is removed. The other supplies
will remain disabled until a valid power-up pushbutton
event takes place.
Figure 15. Power-Down via Pushbutton
V
OUT
UVLO
PBSTAT
BUCK1
BUCK2
LDO2
LDO1
PGOOD
PWR_ON
STATE PON PDN POFF
36773 F16
ON (PB)
1 SEC
Figure 16. V
OUT
UVLO Power-Down
V
OUT
UVLO
PBSTAT
BUCK1
BUCK2
LDO2
PGOOD
PWR_ON
STATE PON PDN POFF
36773 F15
ON (PB)
1 SEC
50ms
µC/µP CONTROL
50ms