Datasheet

LTC3677-3
28
36773f
operaTion
The power good status bits of LDO1 and LDO2 are avail-
able in I
2
C through the read-back registers PGLDO[1] and
PGLDO[2] for LDO1 and LDO2 respectively. The power
good comparators for both LDOs are sampled when the
I
2
C port receives the correct I
2
C read address.
Figure 7 shows the LDO application circuit. The full-scale
output voltage for each LDO is programmed using a resistor
divider from the LDO output (LDO1 or LDO2) connected
to the feedback pins (LDO1_FB or LDO2_FB) such that:
V V
R
R
LDOx
= +






0 8
1
2
1. •
For stability, each LDO output must be bypassed to ground
with a minimum 1μF ceramic capacitor (C
OUT
).
step-down switching regulators also include soft-start to
limit inrush current when powering on, short-circuit cur-
rent protection, and switch node slew limiting circuitry to
reduce EMI radiation. No external compensation compo-
nents are required for the switching regulators. Switching
regulators 1 and 2 (Buck1 and Buck2) are sequenced up
and down together through the pushbutton interface (see
the Pushbutton Interface section for more information),
while Buck3 has an individual enable pin (EN3) that is ac-
tive when the pushbutton is in the power-up or power-on
states. Buck3 is disabled in the power down and power off
states. It is recommended that the step-down switching
regulator input supplies (V
IN12
and V
IN3
) be connected to the
system supply pin (V
OUT
). This is recommended because
the undervoltage lockout circuit on the V
OUT
pin (V
OUT
UVLO) disables the step-down switching regulators when
the V
OUT
voltage drops below the V
OUT
UVLO threshold. If
driving the step-down switching regulator input supplies
from a voltage other than V
OUT
the regulators should
not be operated outside the specified operating range as
operation is not guaranteed beyond this range.
Output Voltage Programming
Figure 8 shows the step-down switching regulator ap-
plication circuit. The full-scale output voltage for each
step-down switching regulator is programmed using a
resistor divider from the step-down switching regulator
output connected to the feedback pins (FB1, FB2 and
FB3) such that:
V V
R
R
OUTx
= +






0 8
1
2
1. •
Figure 7. LDO Application Circuit
0.8V
R1
LDOx
OUTPUT
C
OUT
R2
36773 F07
MP
V
INLDOx
GND
LDOx_FB
1
0
LDOx
LDOxEN
Figure 8. Step-Down Switching Regulator Application Circuit
0.8V
R1
L
V
OUTx
C
OUT
C
FB
R2
36773 F08
MP
MN
EN
MODE
SLEW
V
IN
GND
FBx
SWx
PWM
CONTROL
STEP-DOWN SWITCHING REGULATOR OPERATION
Introduction
The LTC3677-3 includes three 2.25MHz constant-frequency
current mode step-down switching regulators providing
500mA, 500mA and 800mA each. All step-down switch-
ing regulators can be programmed for a minimum output
voltage of 0.8V and can be used to power a microcontroller
core, microcontroller I/O, memory or other logic circuitry.
All step-down switching regulators support 100% duty
cycle operation (low dropout mode) when the input volt-
age drops very close to the output voltage and are also
capable of Burst Mode operation for highest efficiencies
at light loads. Burst Mode operation is individually select-
able for each step-down switching regulator through the
I
2
C register bits BK1BRST, BK2BRST and BK3BRST. The