Datasheet

LTC3677-3
27
36773f
operaTion
Dual Input Overvoltage Protection
It is possible to protect both V
BUS
and WALL from over-
voltage damage with several additional components, as
shown in Figure 5. Schottky diodes D1 and D2 pass the
larger of V1 and V2 to R1 and OVSENS. If either V1 or V2
exceeds 6V plus V
F(SCHOTTKY)
, OVGATE will be pulled to
GND and both the WALL and USB inputs will be protected.
Each input is protected up to the drain-source breakdown,
BVDSS, of MN1 and MN2. R1 must also be rated for the
power dissipated during maximum overvoltage. See the
Overvoltage Protection section for an explanation of this
calculation. Table 2 shows some N-channel MOSFETs that
maybe suitable for overvoltage protection.
Table 2. Recommended Overvoltage FETs
N-CHANNEL
MOSFET
BVDSS R
ON
PACKAGE
Si1472DH 30V 82mΩ SC70-6
Si2302ADS 20V 60mΩ SOT-23
Si2306BDS 30V 65mΩ SOT-23
Si2316BDS 30V 80mΩ SOT-23
IRLML2502 20V 35mΩ SOT-23
Reverse Input Voltage Protection
The LTC3677-3 can also be easily protected against the
application of reverse voltage as shown in Figure 6. D1
and R1 are necessary to limit the maximum VGS seen by
MP1 during positive overvoltage events. D1’s breakdown
voltage must be safely below MP1’s BVGS. The circuit
shown in Figure 6 offers forward voltage protection up
to MN1’s BVDSS and reverse voltage protection up to
MP1’s BVDSS.
Figure 5. Dual Input Overvoltage Protection
C1D1
R1
MN2
MN1
D2
V1
V2
36773 F05
WALL
OVGATE
LTC3677-3
V
BUS
OVSENS
Figure 6. Dual Polarity Voltage Protection
D1
C1
R2
6.2k
R1
500k
D1: 5.6V ZENER
MP1: Si2323 DS, BVDSS = 20V
V
BUS
POSITIVE PROTECTION UP TO BVDSS OF MN1
V
BUS
NEGATIVE PROTECTION UP TO BVDSS OF MP1
MN1MP1
USB/WALL
ADAPTER
36773 F06
V
BUS
OVGATE
LTC3677-3
OVSENS
LOW DROPOUT LINEAR REGULATOR OPERATION
LDO Operation and Voltage Programming
The LTC3677-3 contains two 150mA adjustable output
LDO regulators. The first LDO (LDO1) is always on and
will be enabled whenever V
OUT
is greater than V
OUT
UVLO. The second LDO (LDO2) is controlled by the
pushbutton and is the first supply to sequence up in re-
sponse to pushbutton application. Both LDOs are disabled
when V
OUT
is less than V
OUT
UVLO and LDO2 is further
disabled when the pushbutton circuity is in the power
down or power off states. Both LDOs contain a soft-start
function to limit inrush current when enabled. The soft-start
function works by ramping up the LDO reference over a
200µs period (typical) when the LDO is enabled.
When disabled all LDO circuitry is powered off leaving
only a few nanoamps of leakage current on the LDO sup-
ply. Both LDO outputs are individually pulled to ground
through internal resistors when disabled.