Datasheet

LTC3676/LTC3676-1
24
3636fa
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OPERATION
IRQSTAT and MSKIRQ Registers
The bits in the MSKIRQ command register are set to mask
warning, fault, and pushbutton status reporting to the IRQ
pin. When set to mask, the IRQ pin is not pulled low as a
result of a fault or warning. Even though the IRQ pin is not
pulled low the masked bit is set in the IRQSTAT register.
When undervoltage, overtemperature faults, and hard
reset signals are masked, the IRQ pin is not pulled low
but LTC3676 state controller is pushed into the STANDBY
or POR/HRST state. Accessing the CLIRQ status register
clears the latched bits in the IRQSTAT status register and
releases the IRQ pin.
Table 16. Interrupt Request Mask Command Register
COMMAND
REGISTER[BIT] VALUE
MSKIRQ [0] 0*
1
Pass Pushbutton Status
Mask Pushbutton Status
MSKIRQ [2] 0*
1
Pass PGOOD T
imeout
Mask PGOOD Timeout
MSKIRQ [3] 0*
1
Pass Under
voltage Warning
Mask Undervoltage Warning
MSKIRQ [4] 0*
1
Pass Under
voltage Shutdown
Mask Undervoltage Shutdown
MSKIRQ [5] 0*
1
Pass Overtemperature W
arning
Mask Overtemperature Warning
MSKIRQ [6] 0*
1
Pass Overtemperature Shutdown
Mask Overtemperature Shutdown
*denotes default power-on value.
IRQ and IRQSTAT are not cleared by hard reset or fault
shutdown. If V
IN
remains applied while the LTC3676 is in
STANDBY or POR/HRST then IRQSTAT may be read on
the subsequent power up to determine if a fault or hard
reset occurred.
RSTO Status Pin
The LTC3676 RSTO status pin is pulled low when always-
on LDO1 is 8% below its programmed value or when the
LTC3676 is in the one second HRST timer state.
Hard Reset
A hard reset can be initiated by holding the ON pin low
or writing to the HRST command register. Bit six of the
CNTRL command register determines how long ON must
remain low to initiate the hard reset. A hard reset sets
all I
2
C command register bits to their default power-on
state. Table 17 shows the command register control of
hard reset function.
Table 17. Hard Reset Time Control Command Register
COMMAND
REGISTER[BIT] VALUE SETTING
CNTRL[6] 0*
1
10 seconds
5 seconds
*denotes default power-on value.
A hard reset command will push the LTC3676 state con-
troller through
the 1 second HRST timer state and into
the POR/HRST state.
Fault Shutdown
An undervoltage or overtemperature fault will push the
LTC3676 state controller through the 1 second standby
timer state and into standby state. If a down sequence
is selected in the command registers, it will be executed
during the 1 second power down interval.
LTC3676-1 Operation
The LTC3676-1 option supports DDR memory operation
by generating a DDR termination reference and supply
rail equal to one-half the voltage applied to VDDQIN Pin 8.
An internal resistive divider creates a reference voltage of
one-half the voltage on VDDQIN. This reference is used
by the V
TT
reference buffer to output one-half of VDDQIN
on VTTR Pin 9. The VTTR voltage is used as the reference
for 1.5A switching regulator 1 which is used as the DDR
termination supply.
Figure 1 shows typical application connections for the
LTC3676-1 DDR termination reference and termination
supply.
LDO4 has I
2
C command register selectable output voltages
of 1.2V (default), 1.8V, 2.5V and 2.8V and is enabled only
using
the I
2
C command register. Table 18 shows the LDO4
command register controls for the LTC3676-1.